Completed Circuit Simulations
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Work has been completed for the following circuit simulation. We welcome your contributions.
No | Circuit Simulation Project | Contributor Name | University / Institute | Year of Completion |
---|---|---|---|---|
358 | Analysis Of Alternating Current Limiter Circuit For Circuit Protection And Power Management | Manimaran | Rajalakshmi Institute Of Technology | 2024 |
357 | 4 Bit Magnitude Comparator using HDL code | Shanthi Priya Kalabandi | Rajiv Gandhi University Of Knowledge Technologies Nuzvid Iiit | 2024 |
356 | Frequency Divider(divide by 16) Using Flip-Flops | Shanthi Priya Kalabandi | Rajiv Gandhi University Of Knowledge Technologies Nuzvid Iiit | 2024 |
355 | Two Output Precision Halfwave Rectifier Using Op-Amp | Praveen M S | Vidyavardhaka College Of Engineering | 2024 |
354 | Design Of Positive Level Triggered Cmos D Latch Circuit | Ujwala Sushil Ghodeswar | Yeshwantrao Chavan College Of Engineering | 2024 |
353 | Adjusting Trigger Points Of Inverting Schmitt Trigger Using Diodes | Nirmitha N | Vidyavardhaka College Of Engineering | 2024 |
352 | Diode Ladder Filter | Pooja R A | Muthoot Institute Of Technology And Science | 2024 |
351 | Design And Simulation Of Asymmetric Astable Multivibrator Using Op-Amps And Diodes | Kaver S A | Vidyavardhaka College Of Engineering | 2024 |
350 | ADSR Envelope Generator | Ann Mariya Johnson | Muthoot Institute Of Technology And Science, Kochi | 2024 |
349 | Logic Gates Represented Using Cmos In A Single Circuit | Vithul Vinu | Muthoot Institute Of Technology And Science | 2024 |
348 | Implementation Of D Flip Flop Using Cmos Technology | Abul Hasan | Aliah University | 2024 |
347 | Dc To Dc Buck Boost Converter | Varad Vilasrao Patil | Shri Guru Gobind Singhji Institute Of Engineering And Technology, At Nanded | 2024 |
346 | Single-Phase Half-Wave Uncontrolled Rectifier With R-Load | Anjali Papansingh Thakur | Shri Guru Gobind Singhji Institute Of Engineering And Technology, At Nanded | 2024 |
345 | Single Phase Full Bridge Inverter | Shweta Khune | Shri Guru Gobind Singhji Institute Of Engineering And Technology, At Nanded | 2024 |
344 | Natural Sampling And Flat-Top Sampling Using Op-Amp. | Kavya A P | Vidyavardhaka College Of Engineering | 2024 |
343 | Implementation Of 3 Input Nand Gate Using Transistor Transistor Logic. | Hamim Reja | Aliah University | 2024 |
342 | Design And Implementation Of Mixed-Signal Bcd To 7-Segment Decoder Using Verilog. | Mir Mousam Ali | Aliah University | 2024 |
341 | Design And Implementation Of 3x3 Cnot Peres Quantum Gate | Aditya Minocha | Manipal Institute Of Technology | 2024 |
340 | Common Collector Configuration Using Npn Bjt | Sudheshna P | Sri Eshwar College Of Engineering | 2024 |
339 | MOSFET based Class B Push Pull Amplifier | Adideb Das | Sikkim Manipal Insititute Of Technology | 2024 |
338 | Ac Voltage Follower Circuit Using Esim | Sree Vishnu Varthini S | Sri Eshwar College Of Engineering, Coimbatore | 2024 |
337 | Voltage Controlled Delay Line For Dll | Abdulrahman Ahmad Alsindiony | Alexandria University - Faculty Of Engineering | 2024 |
336 | Variable Nine Pulse Ac Converter | Kanimozhi. K | St.xavier'S Catholic College Of Engineering, Chunkankadai. | 2024 |
335 | Study Of High & Low Frequency Response Of Fet Amplifier | Arun Pandiyan P B | Karpagam College Of Engineering | 2024 |
334 | KHN Biquad Active Filter Design | Nameera Jabi | Jamia Millia Islamia,delhi | 2024 |
333 | Design Of Fredkin Cswap Quantum Gate Using Sky130 Pdk | Devansh Raut | Manipal Institute Of Technology | 2024 |
332 | Implemention Of 2 Input Exclusive-Or Gate Using Emitter Coupled Logic | Mir Mousam Ali | Aliah University | 2024 |
331 | Generation Of Pn Sequence With Internal 555 Timer-Based Clock Using eSim And SKY130 | Ashwini Kumar | Vellore Institute Of Technology, Vellore | 2024 |
330 | A Two Stage Common Emitter Amplifier In A Cascade Configuration With Npn And Pnp Transistor. | Krishan Kumar | National Institute Of Technology, Agartala | 2024 |
329 | Two Stage Amplifier Using Mosfet(cascade Configuration) | Bhargav Digambar Dhoke | Shri Guru Gobind Singhji Institute Of Engineering And Technology, Nanded | 2023 |
328 | Design And Analysis Of Twin-T Oscillator | Gadhiraju Surya Anirudh | Jawaharlal Nehru Technological University Hyderabad College Of Engineering Hyderabad | 2023 |
327 | Single-Ended Primary Inductor Converter | Karthik Ayyala | National Institute Of Technology, Manipur | 2023 |
326 | Design Of A Self-Starting (lock-Out Free) 4-Bit Johnson Counter | Abhinav Tripathi | Rajiv Gandhi Institute Of Petroleum Technology | 2023 |
325 | Design And Mixed Signal Simulation Of a 4-Bit Pseudo Random Sequence Generator(LFSR) | Roshan Binu Paul | Muthoot Institute Of Technology And Science | 2023 |
324 | Design Of Voltage-Controlled Oscillator using SKY130 Technology | Aman Singh | Rajiv Gandhi Institute Of Petroleum Technology | 2023 |
323 | Active Bandstop Filter Circuit | Vignesh S | Karpagam College Of Engineering | 2023 |
322 | Common Emitter Bjt Amplifier Circuit | Shubhi Saxena | Uit-Rgpv, Bhopal | 2023 |
321 | Universal Shift Register Using Sr Flip Flop | Tabish Ahmad | Zakir Hussain College Of Engineering And Technology, Aligarh Muslim University | 2023 |
320 | Design And Analysis Of An Array Multiplier Using An Area Efficient Full Adder Cell (using 10t Full Adder) with SKY130 | Kanchan Kumar Kaity | Kalyani Government Engineering College | 2023 |
319 | Quadruple Two To One Line Multiplexer | Monisha.k | Vellore Institute Of Technology,chennai | 2023 |
318 | Implementation Of ASK Using SKY130 | Amit Kripashankar Dubey | Shree L R Tiwari College Of Enginnering | 2023 |
317 | Design Of Delta-Sigma Modulator Using eSim And SKY130 | Ashwini Kumar | Vellore Institute Of Technology, Vellore | 2023 |
316 | Mixed Signal SerDes Design Using SKY130 And eSim | Ayush Gupta | SRM Institute Of Science And Technology, Kattankulathur | 2023 |
315 | Amplitude Shift Keying Modulation-Demodulation Using Mixed Signal Circuit | Hrittika Ghosh | Jadavpur University | 2022 |
314 | Shunt Voltage Regulator Using An Op-Amp | Kanishk K U | Srm Institute Of Science And Technology | 2022 |
313 | Implementation Of Lewis Gray Comparator Circuit Performed In Esim | Gaurav Kumar | Dronacharya Group Of Institutions, Greater Noida | 2022 |
312 | Techniques Of Modulation: Pulse Amplitude Modulation, Pulse Width Modulation With Mixed Signal | Partha Singha Roy | Kalyani Government Engineering College | 2022 |
311 | 6T CMOS Transmission Gates (tg) Implementation Of The XOR Function using SKY130 and NgVeri | Amisha Shyam Sakhare | Birla Vishvakarma Mahavidyalaya | 2022 |
310 | Mod 8 Up/down Synchronous Counter Using 130nm Cmos Technology | Swagatika Meher | Odisha University Of Technology And Research, Bhubaneswar, Odisha | 2022 |
309 | Mod 5 Synchronous Counter Using Mixed Signal And Sky130 | Subhradip Chakraborty | Rajiv Gandhi Institute Of Petroleum Technology | 2022 |
308 | Design And Implementation Of Radiation-Hardened SRAM(SKY130) | Jayanth Nedunuri | Jyothishmathi Institute Of Technology And Science | 2022 |
307 | 4-Bit Wallace Tree Multiplier(with SKY130) | Amisha Shyam Sakhare | Birla Vishvakarma Mahavidyalaya | 2022 |
306 | Mixed Signal Phase Frequency Detector Using Sky130pdk | Kanish R | Rajalakshmi Engineering College | 2022 |
305 | Mixed Signal 16 Bit Adder Using Sky130pdk | Kanish R | Rajalakshmi Engineering College | 2022 |
304 | Fet Based Master Slave Negative Edge Triggered Flipflop Using Sky130pdk | Kanish R | Rajalakshmi Engineering College | 2022 |
303 | Amplitude Modulation-Demodulation Using eSim | Hrittika Ghosh | Jadavpur University | 2022 |
302 | Design Of Inverting Amplifier Using Lm741ic | Nandha Kumar S | Vellore Institute Of Technology, Chennai | 2022 |
301 | Half Bridge Inverter | Kamalesh D | Vellore Institute Of Technology | 2022 |
300 | Design Of 4 Bit Magnitude Comparator Using Only Logic Gates | Mitta Venkata Rakesh Gupta | Vellore Institute Of Technology Chennai | 2022 |
299 | Common Source Amplifier Using Jfet | M Jinu Mol | St. Xavier'S Catholic College Of Engineering, Nagercoil. | 2022 |
298 | Series Diode Positive Limiting Circuit | Sanket Prakash Taile | Yeshwantrao Chavan College Of Engineering Nagpur | 2022 |
297 | Quasi Z Source Inverter (qzsi) | Bhakti Santosh Khumkar | Yeshwantrao Chavan College Of Engineering, Nagpur | 2022 |
296 | Parallel Diode Positive Limiting Circuit. | Avant Rajiv Bagde | Yeshwantrao Chavan College Of Engineering Nagpur | 2022 |
295 | Design Of Two Input Or Gate Using Transmission Gate | Ujwala Ghodeswar | Yeshwantrao Chavan College Of Engineering | 2022 |
294 | Implementation Of 4 Bit Binary Counter Mixed-Signal Circuit Performed In Esim | E Balakrishna | Dronacharya Group Of Institutions, Greater Noida | 2022 |
293 | Design And Implementation Of 4-Bit Magnitude Comparator Mixed Signal Circuit Performed In Esim | Vanshika Tanwar | Dronacharya Group Of Institution | 2022 |
292 | Design Of A Static Ram(sram) Cell Based On D Flip-Flop Using Sky130nm Technology, Esim And Ng Spice Simulation Software | Ankush Mondal | National Institute Of Technology Durgapur | 2022 |
291 | Design And Implementation Of Mixed-Signal 6t Sram Cell In Cmos Technology | Ankit Kumar | Government Engineering College Raipur | 2022 |
290 | Full Adder Using Cmos Mirror Logic | Yajnesh K | Mangalore Institute Of Technology & Engineering | 2022 |
289 | Design Of Mixed Signal Based Buck-Converter Using Esim | Dilip Boidya | Tezpur University | 2022 |
288 | Squarewaveform Generator Using Cmos And Sky130 Pdk | Ankit Kumar | Government Engineering College Raipur | 2022 |
287 | Mixed-Signal Implementation Of Mod-10 (decade) Ripple Counter Using Ngveri Tool Of Esim | Mohammad Khalique Khan | Aliah University | 2022 |
286 | Design of Toffoli CCNOT Quantum Gate using Sky130 | Arpit Sharma | Inderprastha Engineering College | 2022 |
285 | Sky130 8-T SRAM Cell for High Speed Application | Vatsal Patel | Vishwakarma Government Engineering College | 2022 |
284 | Octal To Binary Encoder Using Cmos Technology, Esim And Sky130 Pdk | Parth Deshpande | Bits Pilani, Kk Birla Goa Campus | 2022 |
283 | Pulse Position Modulator Using Ic 555 Timer With Esim. | Emandi Aakash | Indian Institute Of Information Technology Tiruchirapalli | 2022 |
282 | Z-Source Inverter | Ajin Raj D | St. Xavier’s Catholic College Of Engineering, Nagercoil. | 2022 |
281 | Full Subtractor | Rongala Arun | Sir C R Reddy College Of Engineering | 2022 |
280 | Cmos Telescopic Cascode Differential Amplifier Using Esim And Sky130 Pdk | Parth Deshpande | Bits Pilani, Kk Birla Goa Campus | 2022 |
279 | 3-Bit Analog To Digital Converter Implemented Using Esim | Trinath Harikrishna | Sri Ramaswamy Memorial Institute Of Science And Technology | 2022 |
278 | Mixed Signal Design Of Variable Frequency Divider Using Esim And Ngveri | Trinath Harikrishna | Sri Ramaswamy Memorial Institute Of Science And Technology | 2022 |
277 | Differential-End Current Starved Vco Implemented Using Skywater130 Pdk On Esim | Trinath Harikrishna | Srm Ist | 2022 |
276 | Single Phase Diode Bridge Rectifier With Cr Load | Nivedita Padole | Yeshwantrao Chavan College Of Engineering, Nagpur | 2022 |
275 | Three-Phase Uncontrolled Rectifier With Rl Load And Filter Circuit. | Akshay Kadu | Yeshwantrao Chavan College Of Engineering Nagpur | 2022 |
274 | Single Phase Uncontrolled Rectifier With Rl Load And Freewheeling Diode | Akshay Dhanraj Kadu | Yeshwantrao Chavan College Of Engineering Nagpur | 2022 |
273 | Effect Of Source Inductance On The Performance Of Diode Bridge Rectifier | Nivedita Padole | Yeshwantrao Chavan College Of Engineering, Nagpur | 2022 |
272 | Simulation Of Two-Input Rtl And Gate Using Esim. | Mahesh S Pawar | Yeshwantrao Chavan College Of Engineering | 2022 |
271 | Design Of Static Cmos Complex Circuit Function Y=not((a+b+c).d) | Ujwala Ghodeswar | Yeshwantrao Chavan College Of Engineering | 2022 |
270 | Design Of A Full Adder Using 2 Half Adder Sub Circuits | Chirag Goel | Vellore Institute Of Technology, Chennai | 2021 |
269 | Asynchronous Down Counter Using D Flip Flop | Shreyas Bhaskar | Vellore Institute of Technology, Chennai | 2021 |
268 | Design Of Half Adder Using 2 X 4 Decoder With Enable | Utukuri Geyarka S Nikhilesh | Vellore Institute Of Technology, Chennai | 2021 |
267 | Half Subtractor Using Nor Gate | Sreenath S | Vellore Institute Of Technology,chennai | 2021 |
266 | Conversion Of 4x1 Multiplexer To 3x1 Multiplexer Using eSim | Aditi Anil Bodkhe | Vellore Institute Of Technology, Chennai | 2021 |
265 | Design Of Xor Gate Using Nand Gates | Utukuri Geyarka S Nikhilesh | Vellore Institute Of Technology, Chennai | 2021 |
264 | 4-Bit Mod-8 Johnson Counter Using J-K Flip-Flop | Anuj Singh Chauhan | Vellore Institute Of Technology, Chennai | 2021 |
263 | Mod-7 Twisted Ring Counter Using J-K Flip Flop | Anuj Singh Chauhan | Vellore Institute of Technology, Chennai | 2021 |
262 | Design Of Xnor Gate Using Nand Gates | Siddhant Sharma | Vellore Institute of Technology, Chennai | 2021 |
261 | Design Of Half Adder Using Nand Gates | Abhimanyu Pundir | Vellore Institute of Technology, Chennai | 2021 |
260 | Half Wave Rectifier For Positive Cycle | Arihantt Nandi | Vellore Institute of Technology, Chennai | 2021 |
259 | Design Of 8 To 1 Multiplexer With Enable | Siddharth Bhuthapuri | Vellore Institute Of Technology, Chennai | 2021 |
258 | Design Of 2x1 Multiplexer | Shyam Sankalp Pattnaik | Vellore Institue Of Technology, Chennai | 2021 |
257 | Logical Circuit For Safety Buzzer In A Car | Sumegh Sadashiv Gonugade | Vellore Institute Of Technology, Chennai | 2021 |
256 | Nand Gate Using Nor Gate | Krishna Kumar S | Vellore Institute of Technology, Chennai | 2021 |
255 | Full Subtractor Using Full Adder Subcircuit | Tarun Elango | Vellore Institue Of Technology, Chennai | 2021 |
254 | Design Of Half Adder Using 4x1 Multiplexer | Karthik Raj R | Vellore Institute Of Technology Chennai | 2021 |
253 | Implementation Of And Gate Using Nor Gates | Shubhangi Agrawal | Vellore Institute Of Technology Chennai | 2021 |
252 | Design Of Xor Gate Using Only Nor Gates | Preeti Pallavi | Vellore Institute Of Technology, Chennai | 2021 |
251 | 4 To 2 Encoder | Krishna Kumar | Vellore Institute of Technology, Chennai | 2021 |
250 | Half Subtractor Using Nor Gates | Darshini R | Vellore Institute Of Technology, Chennai | 2021 |
249 | Full Wave Rectifier Using Filter | Akanksha Goel | Vellore Institute Of Technology, Chennai | 2021 |
248 | Design A Full Adder Using A 4:1 Mux | Bhavishya Kumar | Vellore Institute of Technology, Chennai | 2021 |
247 | 2 - Bit Magnitude Comparator | Sam Meshach D | Vellore Institute of Technology, Chennai | 2021 |
246 | Square of A 3 Bit Binary Number | Bharathi E | Government Polytechnic, Obulavaripalli | 2021 |
245 | Or Gate Using Nand Gate | Krishna Kumar S | Vellore Institute of Technology, Chennai | 2021 |
244 | Implementation Of Or Gate Using Nor Gate. | Civanesh C | Vellore Institute of Technology, Chennai | 2021 |
243 | Binary Weighted Resistor Dac | N. Saikiran | Government Polytechnic, Obulavaripalli | 2021 |
242 | 3 Bit Bidirectional Counter | Sowmya B | Government Polytechnic, Obulavaripalli | 2021 |
241 | Asynchronous 4bit Up Counter Using D Flip Flop | Tushar Moolchandani | Vellore Institute of Technology, Chennai | 2021 |
240 | 8 Bit Asynchronous Up Counter Using Jk Flip Flop | Tushar Moolchandani | Vellore Institute of Technology, Chennai | 2021 |
239 | Full Adder Using 3x8 Decoder | Vaishnavi Shukla | Vellore Institute of Technology, Chennai | 2021 |
238 | Implementing SR Flip Flop using NAND Gates | Arjun Vishanth | Vellore Institute of Technology, Chennai | 2021 |
237 | Implementation Of And Gate Logic Using Nand(universal) Gate Logic | Hari Baskar | Vellore Institute of Technology, Chennai | 2021 |
236 | Half Adder Using Nor Gates | Arnab Mondal | Vellore Institute of Technology, Chennai | 2021 |
235 | 3-Bit Asynchronous Down Counter Using D Flip Flops | Rishi Nair | Vellore Institute of Technology, Chennai | 2021 |
234 | Design Of A Nand Gate Based Decoder With Enable | Neha Ann Shygen | Vellore Institute of Technology, Chennai | 2021 |
233 | 4 Bit Mod-3 Counter | Rs Jyothish | Vellore Institute of Technology, Chennai | 2021 |
232 | Half Adder Using Nor Gates | Dikshita Mehta | Vellore Institute of Technology, Chennai | 2021 |
231 | Half Adder Using Nand Gates And Sub-Circuit | Akash S | Vellore Institute of Technology, Chennai | 2021 |
230 | Design Of Full Subtractor Using Nand Gates | Utukuri Geyarka S Nikhilesh | Vellore Institute of Technology, Chennai | 2021 |
229 | 9'S Complement Of A Bcd Digit | Susmitha K | Government Polytechnic, Obulavaripalli | 2021 |
228 | 4-Bit Mod-6 Counter Using Jk Flip Flop | Rs Jyothish | Vellore Institute of Technology, Chennai | 2021 |
227 | 4-Bit Even Odd Parity Generator | Vishakha Agarwal | Vellore Institute of Technology, Chennai | 2021 |
226 | Design Of 4 To 1 Multiplexer | Altaf Pathan | Vellore Institute of Technology, Chennai | 2021 |
225 | 3-Bit Synchronous Down Counter (using JK Flip Flops) | Gokul Jayan | Vellore Institute of Technology, Chennai | 2021 |
224 | Full Adder Using Nand Gates | Arnab Mondal | Vellore Institute of Technology, Chennai | 2021 |
223 | Full Subtractor Using 3:8 Decoder | Ajith Suresh | Vellore Institute of Technology, Chennai | 2021 |
222 | 4x1 Multiplexer Using 2x1 Multiplexer | Vinay Karnati | Vellore Institute of Technology, Chennai | 2021 |
221 | Design Of Full Adder Using Nor Gates | Abhimanyu Pundir | Vellore Institute of Technology, Chennai | 2021 |
220 | Design Of A 4-Bit Binary Adder Subtractor Circuit In Alu Using Full Adder Subcircuit In eSim | Sai Samyuktha N | Vellore Institute of Technology, Chennai | 2021 |
219 | Design Of 3 X 8 Decoder Using 2 X 4 Decoders | Utukuri Geyarka S Nikhilesh | Vellore Institute of Technology, Chennai | 2021 |
218 | 4-Bit_asynchronous_down_counter | Tushar Moolchandani | Vellore Institute of Technology, Chennai | 2021 |
217 | 1:4 De Multiplexer | Krishna Kumar | Vellore Institute of Technology, Chennai | 2021 |
216 | Half Subtractor Using Nand Gate | Sreenath S | Vellore Institute of Technology, Chennai | 2021 |
215 | Simple Elevator Door Controller For A Three-Story Building Using eSim | Aditi Anil Bodkhe | Vellore Institute of Technology, Chennai | 2021 |
214 | Full Subtractor Using Nor Gate Only(using 2 Half-Adder As A Subcircuit With Nor Gate Only) | Sumegh Sadashiv Gonugade | Vellore Institute of Technology, Chennai | 2021 |
213 | Design Of 4-Bit Binary Combinational Lock Using Subcircuit Builder In eSim | Navin Kumar M | Vellore Institute of Technology, Chennai | 2021 |
212 | 4-Bit Ripple Counter Using D-Flipflops | Harsh Aryan | Vellore Institute of Technology, Chennai | 2021 |
211 | Full Adder Using Ngspice | Vaishnavi Shukla | Vellore Institute of Technology, Chennai | 2021 |
210 | 4-Bit Odd And Even Parity Generator | Malay Baldha | Vellore Institute of Technology, Chennai | 2021 |
209 | Design Of A 4-Bit Binary To Bcd Code Converter Ciruit Using Subcircuit Builder In eSim | S Gopi | Vellore Institute of Technology, Chennai | 2021 |
208 | Full Adder Using 3-8 Decoder | Vinay Karnati | Vellore Institute of Technology, Chennai | 2021 |
207 | Design Of 3 To 8 Line Decoder | Siddharth Bhuthapuri | Vellore Institute of Technology, Chennai | 2021 |
206 | Design A Full Adder Using A 3 X 8 Decoder | Siddhant Sharma | Vellore Institute of Technology, Chennai | 2021 |
205 | Binary To Grey Code Converter Using Logic Gates | Civanesh C | Vellore Institute of Technology, Chennai | 2021 |
204 | 4-Bit Asynchronous Up Counter | Darshini R | Vellore Institute of Technology, Chennai | 2021 |
203 | Design Of Excess-3 Code To Bcd Code | Arnab Mondal | Vellore Institute of Technology, Chennai | 2021 |
202 | Design of Single-Bit Magnitude Comparator | Preeti Pallavi | Vellore Institute of Technology, Chennai | 2021 |
201 | Design of A 4-Bit Gray To Binary Code Converter Circuit with Main Circuit And Subciruit Implementation using eSim | Sai Samyuktha N | Vellore Institute of Technology, Chennai | 2021 |
200 | De Morgan’s Verification Circuit | Shubhangi Agrawal | Vellore Institute of Technology, Chennai | 2021 |
199 | Design of Full Subtractor using 4×1 Multiplexer as a Sub Circuit | Karthik Raj R | Vellore Institute of Technology, Chennai | 2021 |
198 | Design of a 4 to 16 Decoder using 3 to 8 Decoders | Neha Ann Shygen | Vellore Institute of Technology, Chennai | 2021 |
197 | 3-Bit Asynchronous Down Counter | Dikshita Mehta | Vellore Institute of Technology, Chennai | 2021 |
196 | Design and Simulation of Non-Inverting Amplifier Circuit | Vigashini G P | Bannari Amman Institute Of Technology, Sathyamangalam | 2021 |
195 | 4t Xor Gate | Jagadheswaran M | Bannari Amman Institute Of Technology, Sathyamangalam | 2021 |
194 | Conventional Cmos Full Adder Circuit | Abhinav Goel | Dronacharya Group Of Institutions, Greater Noida | 2021 |
193 | Sequence Detector For The Sequence 1001 | Hari Baskar | Vellore Institute of Technology, Chennai | 2021 |
192 | Bcd To Excess-3 Code Conversion | Arjun Vishanth | Vellore Institute of Technology, Chennai | 2021 |
191 | 3 Bit Synchronous Up Counter Using JK Flip Flops | Rishi Nair | Vellore Institute of Technology, Chennai | 2021 |
190 | 2 To 4 Decoder (with Enable) | Sam Meshach D | Vellore Institute of Technology, Chennai | 2021 |
189 | Full Subtractor using 1x4 De-Multiplexer | Ajith Suresh | Vellore Institute of Technology, Chennai | 2021 |
188 | Design of 4 To 2 Priority Encoder using Sub-Circuit Builder | Akash S | Vellore Institute of Technology, Chennai | 2021 |
187 | Full Subtractor Circuit Using Subcircuits (2 Half Subtractors) | Tarun Elango | Vellore Institue Of Technology, Chennai | 2021 |
186 | Design Of A 4-Bit Bcd To Gray Code Converter Circuit Using eSim | Sai Samyuktha N | Vellore Institute of Technology, Chennai | 2021 |
185 | Cmos Rs Flip-Flop | Vishnupriya J | Bannari Amman Institute Of Technology, Sathyamangalam | 2021 |
184 | Bcd to Decimal Code Converter | Altaf Pathan | Vellore Institute of Technology, Chennai | 2021 |
183 | 3-Bit Asynchronous Up Counter (using JK Flip Flops) | Gokul Jayan | Vellore Institute of Technology, Chennai | 2021 |
182 | 2'S Complement o a 4-Bit Number | Vishakha Agarwal | Vellore Institute of Technology, Chennai | 2021 |
181 | Adiabatic Logic Circuits | Yashwanthi V | Bannari Amman Institute Of Technology, Sathyamangalam | 2021 |
180 | Design Of Half Adder Circuit Using Subcircuit Builder In eSim | S Gopi | Vellore Institute of Technology, Chennai | 2021 |
179 | Reversible XOR Full Adder | Srinigha A | Bannari Amman Institute Of Technology, Sathyamangalam | 2021 |
178 | 12t Full Adder Design | Dhanussh Aditya V | Bannari Amman Institute Of Technology, Sathyamangalam | 2021 |
177 | Inverting Amplifier And Cmos Inverter: Phase180inverse | Dr. Savita Gaur Kumar | Defence Research and Development Organisation (DRDO) | 2021 |
176 | Programmable Frequency Divider | Arjun Bathla | Vellore Institute of Technology, Chennai | 2021 |
175 | Crc (7, 4) Decoder For Serial Data | Arjun Bathla | Vellore Institute of Technology, Chennai | 2021 |
174 | Crc (7, 4) Encoder For Serial Data | Arjun Bathla | Vellore Institute of Technology, Chennai | 2021 |
173 | Cyclic Redundancy Check (7, 4) Decoder Circuit | Arjun Bathla | Vellore Institute of Technology, Chennai | 2021 |
172 | Transistor Based Three-Phase Sine Wave Generator | Pravallikaa M | Vellore Institute of Technology, Chennai | 2021 |
171 | Design Of Full Wave Precision Rectifier Circuit Using Op-Amp | Prarthana Prasanna Kumar | Vellore Institute of Technology, Chennai | 2021 |
170 | Design Of Half Wave Precision Rectifier Circuit Using Op-Amp | Prarthana Prasanna Kumar | Vellore Institute of Technology, Chennai | 2021 |
169 | Square Wave Generator Using Lm741 | Tahanvi Yadav | Vellore Institute of Technology, Chennai | 2021 |
168 | Positive Clamper Using Lm741 Op Amp | Ashita Banger | Vellore Institute of Technology, Chennai | 2021 |
167 | Cyclic Redundancy Check (7, 4) Encoder Circuit | Arjun Bathla | Vellore Institute of Technology, Chennai | 2021 |
166 | Negative Clamper Using Lm741 Op Amp | Ashita Banger | Vellore Institute of Technology, Chennai | 2021 |
165 | Design And Analysis Of Vackar Oscillator | Achyut Agrawal | Vellore Institute of Technology, Chennai | 2021 |
164 | Non-Inverting Summer Using Op-Amp | Karthick Srivatsa R | Vellore Institute of Technology, Chennai | 2021 |
163 | Inverting Summer Using Op-Amp | Karthick Srivatsa R | Vellore Institute of Technology, Chennai | 2021 |
162 | Design of Square Wave to Sawtooth Wave Convertor Circuit using BJT | Prarthana Prasanna Kumar | Vellore Institute of Technology, Chennai | 2021 |
161 | Luo Converter | Krithika B S | Vellore Institute of Technology, Chennai | 2021 |
160 | Design Of Ic 7483 | Cc Kalyani | Government Polytechnic, Obulavaripalli | 2021 |
159 | 8 To 3 Bit Priority Encoder | Mohammad Khalique Khan | Aliah University, Kolkata | 2021 |
158 | Quadrature Oscillator Using Opamp | Usha Kola | Government Polytechnic, Obulavaripalli | 2021 |
157 | Small Signal Power Amplifier | Chandragiri Praveen Gandhi | SRM Institute of Science And Technology, Chennai | 2021 |
156 | RTL_XOR_using_BJT | Prashant Panchal | Sir Chhotu Ram Institute Of Engineering And Technology, Meerut | 2021 |
155 | 4-Bit Right Barrel Shifter Using 2:1 Multiplexers | Shikhar Chandra | Vellore Institute of Technology, Chennai | 2021 |
154 | 6-Bit Unsigned Multiplier Circuit With Dadda Tree Reduction And Brent-Kung Adder | Reuel Reuben | Bharati Vidyapeeth College Of Engineering Pune | 2021 |
153 | Three Phase Half Wave Uncontolled Rectifier With Rl Load | Hrushikesh Kulkarni | JSS Science And Technology University, Mysuru | 2021 |
152 | Three-Phase Full-Wave Rectification With R Load | Sahana D V | JSS Science And Technology University, Mysuru | 2021 |
151 | RTL of Full Adder using BJT Design and Simulation using eSim | Prashant Panchal | Sir Chhotu Ram Institute Of Engineering And Technology, Meerut | 2021 |
150 | 3- Bit Even And Odd Parity Generator | Chirumerla Sri Lahari | Vellore Institute of Technology, Chennai | 2021 |
149 | Design Of 4-Bit Braun Multiplier Using Kogge-Stone Adder | P Manikandan Nair | Vellore Institute of Technology, Chennai | 2021 |
148 | Howland Current Pump Circuit | Naman Girdhar | Vellore Institute of Technology, Chennai | 2021 |
147 | Analysis Of MOSFET Characteristics | Monica Singh | Vellore Institute of Technology, Chennai | 2021 |
146 | All Pass Filter Using Op Amp | Nallam Karthikeya Kumar | Vellore Institute of Technology, Chennai | 2021 |
145 | Zero Crossing Detector | A.Dave Andrew | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
144 | Wide Band Pass Filter Using Op-Amp 741 | Kartik S Patil | Ramaiah Institute Of Technology, Bangalore | 2020 |
143 | Class B Commutation Of SCR | Kimberly Gemina Morais | Don Bosco College Of Engineering, Goa | 2020 |
142 | Karthaus - Fischer Cascade Voltage Doubler (kfcvd) Circuit | Francy Rani S | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
141 | Inverting Schmitt Trigger Using 555 Timer | R. Divya | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
140 | Design Of LM317 | Katakam V N Manikanta Bhargav | National Institute of Technology Durgapur | 2020 |
139 | Unity Gain Phase Splitter | W Vinil Dani | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
138 | Voltage Quadrupler | M Jinu Mol | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
137 | Digital Sine-Wave Generator Using D Flip-Flop | Shalin A | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
136 | Design Of 4n25 Opto Isolator | Katakam V N Manikanta Bhargav | National Institute of Technology Durgapur | 2020 |
135 | Narrow Band Pass Filter Using Op-Amp 741. | Nadeem Sharief B | M. S Ramaiah Institute Of Technology | 2020 |
134 | Design Of 3 Bit Sipo Shift Register | Katakam V N Manikanta Bhargav | National Institute of Technology Durgapur | 2020 |
133 | Narrow Band Reject Filter(notch Filter) | Shwethaa Rajagopalan | Ramaiah Institute Of Technology, Bangalore | 2020 |
132 | Single Phase AC Voltage Controller With R- Load | P Suji Garland | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
131 | SEPIC Converter | Leon Bosco Raj J | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
130 | Nine Phase Uncontrolled Rectifier | Shalin. A | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
129 | Five- Phase Uncontrolled Line Commutated Rectifier | Jesus Bobin V | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
128 | Cuk Converter | Leon Bosco Raj J | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
127 | Fully Controlled 5 Phase, 10 Pulse Rectifier | Jesus Bobin V | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
126 | Boost Converter | Leon Bosco Raj J | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
125 | Transistor Based Water Level Indicator Alarm/ Buzzer | Maheswari R | Vellore Institute of Technology, Chennai | 2020 |
124 | Single Phase Inverter | Leon Bosco Raj J | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
123 | Buck Converter | Leon Bosco Raj J | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
122 | Analysis Of Analog Divider Circuit Using Opamp | Shekhar Maruti Nandanwar | KC College Of Engineering And Management Studies And Research, Mumbai | 2020 |
121 | State Variable Filter | Shekhar Maruti Nandanwar | KC College Of Engineering And Management Studies And Research, Mumbai | 2020 |
120 | Peak Detector Circuit | Shekhar Maruti Nandanwar | KC College Of Engineering And Management Studies And Research, Mumbai | 2020 |
119 | Three-Phase Inverter | Mohamed Abdullah | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
118 | 12 Volt And 5 Volt Power Supply | Shekhar Maruti Nandanwar | KC College Of Engineering And Management Studies And Research, Mumbai | 2020 |
117 | Current Mirror | Kimberly Gemina Morais | Don Bosco College Of Engineering, Goa | 2020 |
116 | Variable Power Supply Using IC 78xx | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra, Mumbai | 2020 |
115 | Decimal To BCD Encoder | Vadissa Yamini | Indian Institute Of Information Technology, Tiruchirapalli | 2020 |
114 | 4 Bit Synchronous Parallel In Parallel Out Register | Maheswari R | Vellore Institute of Technology, Chennai | 2020 |
113 | Voltage Shunt Feedback Amplifier | Shubangi Mahajan | Indian Institute Of Information Technology, Tiruchirapalli | 2020 |
112 | Three Level Comparator | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra, Mumbai | 2020 |
111 | Triangular Wave Generator Using 555 Timer | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra, Mumbai | 2020 |
110 | Constant K High Pass Filter | Shubangi Mahajan | Indian Institute Of Information Technology, Tiruchirapalli | 2020 |
109 | Full Wave Rectifier With Capacitor Filter | Shubangi Mahajan | Indian Institute Of Information Technology, Tiruchirapalli | 2020 |
108 | Clapps Oscillator | Shubangi Mahajan | Indian Institute Of Information Technology, Tiruchirapalli | 2020 |
107 | 4 Bit Synchronous Serial In Parallel Out (SIPO) Shift Register | Maheswari R | Vellore Institute of Technology, Chennai | 2020 |
106 | PWM Modulator Using 555 Timer IC | Vadisa Yamini | Indian Institute Of Information Technology, Tiruchirapalli | 2020 |
105 | Bistable Multivibrator | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra, Mumbai | 2020 |
104 | 3 Phase Fully Controlled Rectifier | Jesus Bobin V | St. Xavier's Catholic College Of Engineering, Nagercoil, Kanyakumari | 2020 |
103 | 4 Bit Synchronous Serial In Serial Out Shift Register | Maheswari R | Vellore Institute of Technology, Chennai | 2020 |
102 | 2:1 MUX Using Transmission Gate(using 0.5um Technology) | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra, Mumbai | 2020 |
101 | Antilog Amplifier Using Op-Amp | Kimberly Gemina Morais | Don Bosco College Of Engineering-Goa | 2020 |
100 | 3 Phase Uncontrolled Rectifier | Jesus Bobin | St. Xavier's Catholic College Of Engineering, Kanyakumari | 2020 |
99 | CMOS NAND Gate Using 0.5um Technology | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra, Mumbai | 2020 |
98 | Implementation Of Odd Stage Ring Oscillator Using 0.5um CMOS Process | Sharath N Chittaragi | SSN College Of Engineering, Chennai | 2020 |
97 | IC LM317 Design And Implementation | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra, Mumbai | 2020 |
96 | 4 Bit Synchronous Down-Counter | Maheswari R | Vellore Institute of Technology, Chennai | 2020 |
95 | IC 555 Testing Circuit | Shekhar Maruti Nandanwar | KC College Of Engineering And Management Studies And Research, Mumbai | 2020 |
94 | Class AB Amplifier | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra | 2020 |
93 | A 2-Bit Binary Adder Subtractor Circuit | Siddharth Singha Roy | Vellore Institute of Technology, Chennai | 2020 |
92 | Monostable Multivibrator Using BJTs | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra, Mumbai | 2020 |
91 | Simple Long Duration Timer Circuit | R. Nivitaa | Dr. Mahalingam College Of Engineering And Technology, Coimbatore | 2020 |
90 | Simple White Noise Generator | A.S. Arunprassath | Dr Mahalingam College Of Engineering And Technology, Coimbatore | 2020 |
89 | 4 Bit Synchronous Up-Counter | Maheswari R | Vellore Institute of Technology, Chennai | 2020 |
88 | BJT based Differential Amplifier | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra, Mumbai | 2020 |
87 | Boot Strap Amplifier Using BJT | P. Yogeshwari | Dr. Mahalingam College Of Engineering And Technology, Coimbatore | 2020 |
86 | Highly Efficient Switching Mode Power Supply Using LM2596 | Sumanto Kar | Fr. Conceicao Rodrigues College Of Engineering, Bandra, Mumbai | 2020 |
85 | Sawtooth Wave Generator | Shekhar Maruti Nandanwar | KC College Of Engineering And Management Studies And Research, Mumbai | 2020 |
84 | Opamp 741 Tester | Shekhar Maruti Nandanwar | KC College Of Engineering And Management Studies And Research, Mumbai | 2020 |
83 | Voltage Doubler Using IC555 | Shekhar Nandanwar | KC College Of Engineering And Management Studies And Research, Mumbai | 2020 |
82 | Dual Polarity Power Supply | Deepa Dilip Divate | Sanjay Ghodawat Polytechnic, Atigre. | 2019 |
81 | Logarithmic Amplifier Using Op-Amp | Kimberly Morais | Don Bosco College Of Engineering, Goa | 2019 |
80 | Current Shunt Feedback Amplifier | Vishvendra Prakash Goyal | Mayurakshi Institute Of Engineering And Technology, Jodhpur | 2019 |
79 | UJT Relaxation Oscillator | Deepa Dilip Divate | Sanjay Ghodawat Polytechnic, Atigre | 2019 |
78 | Design of Schmitt Trigger using Transistors | Vishvendra Prakash Goyal | Mayurakshi Institute Of Engineering And Technology, Jodhpur | 2019 |
77 | Comparator Circuit using Op-Amp | Kimberly Morais | Don Bosco College Of Engineering, Goa | 2019 |
76 | Triangular Wave Generator using Op-Amp | Sebin Sunny P | Sreepathy Institute Of Management and Technology, Palakkad | 2019 |
75 | Function Generator using NE566 | Mohd Irfan Yakub Ali | Kakatiya Institute Of Technology And Science,Warangal | 2019 |
74 | Non-Inverting Amplifier | Sebin Sunny P | Sreepathy Institute Of Management and Technology, Palakkad | 2019 |
73 | Design of 4 Bit ALU | Padigepati Mallikarjuna Reddy | National Institute Of Technology Durgapur | 2019 |
72 | Design of Four Bit Vedic Multiplier | Katakam V N Manikanta Bhargav | National Institute Of Technology Durgapur | 2019 |
71 | Design of 1 Bit Logic Unit | Padigepati Mallikarjuna Reddy | National Institute Of Technology Durgapur | 2019 |
70 | Design of Full Subtractor Circuit | Katakam V N Manikanta Bhargav | National Institute Of Technology Durgapur | 2019 |
69 | 8 Bit Comparator using 7485 IC | Padigepati Mallikarjuna Reddy | National Institute Of Technology Durgapur | 2019 |
68 | Design of 74157 IC | Padigepati Mallikarjuna Reddy | National Institute Of Technology Durgapur | 2019 |
67 | Design of Half Subtractor Circuit | Katakam V N Manikanta Bhargav | National Institute Of Technology Durgapur | 2019 |
66 | Design of Four Bit Carry Save Adder | Katakam V N Manikanta Bhargav | National Institute Of Technology Durgapur | 2019 |
65 | Design of 4 Bit Full Adder with Fast Carry | Padigepati Mallikarjuna Reddy | National Institute Of Technology Durgapur | 2019 |
64 | Design of 74153 IC | Padigepati Mallikarjuna Reddy | National Institute Of Technollogy Durgapur | 2019 |
63 | Design of Two Bit Carry Look Ahead Adder using eSim | Katakam V N Manikanta Bhargav | National Institute Of Technology Durgapur | 2019 |
62 | RTL NOR Gate Design and Simulation | Atin Mukherjee | Dr. B.C.Roy Polytechnic, Durgapur | 2019 |
61 | Design of Two Bit Multiplier | Katakam V N Manikanta Bhargav | National Institute Of Technology Durgapur | 2019 |
60 | RTL Nand Gate Design and Simulation | Atin Mukherjee | Dr. B.C.Roy Polytechnic, Durgapur | 2019 |
59 | RTL Inverter Gate Design and Simulation | Atin Mukherjee | Dr. B.C.Roy Polytechnic, Durgapur | 2019 |
58 | Analysis of Astable Multivibrator using Transistors | Vishnu Mohan | College Of Engineering Vadakara | 2019 |
57 | Implementation of Bistable Multivibrator using Transistors | Sharath N Chittaragi | SSN College Of Engineering, Chennai | 2019 |
56 | Design of Dual Timer IC Circuit using LM555 in eSim | Katakam V N Manikanta Bhargav | National Institute Of Technology Durgapur | 2019 |
55 | Design of Digital Decoder Counter using LM555 and IC4017 using eSim | Katakam V N Manikanta Bhargav | National Institute Of Technology Durgapur | 2019 |
54 | Darlington Pair Amplifier | Donepudi Suresh Babu | PSCMR College Of Engineering & Technology, Vijayawada | 2019 |
53 | Class A Amplifier | Karthika K. | K.S.Rangasamy College Of Technology, Tiruchengode | 2018 |
52 | Pre-emphasis and De-emphasis using IC 741 Op-amp | Akshay N. H. | PES University, Bangalore | 2018 |
51 | Double Tail Comparator | Athul M. S. | Vellore institute of Technology, Vellore | 2018 |
50 | 4:16 Demultiplexer | Akshay N. H. | PES University, Bangalore | 2018 |
49 | Series Regulator using Zener Diode as Control Element | Sai Dharini | Anna University | 2018 |
48 | Carry Look Ahead Adder | Akshay N. H. | PES University, Bangalore | 2018 |
47 | Carry Select Adder using BEC Logic | Athul M. S. | Vellore Institute of Technology, Vellore | 2018 |
46 | Voltage Series Feedback Amplifier | Donepudi Suresh Babu | PSCMR College Of Engineering & Technology, Vijayawada | 2018 |
45 | Bidirectional Shift Register using Flip Flops and Basic Gates | Akshay N. H. | PES University, Bangalore | 2018 |
44 | Amplitude Shift Keying | Karthika K | K.S.Rangasamy College Of Technology, Tiruchengode | 2018 |
43 | Instrumentation Amplifier | Pranav M | BMS College Of Engineering, Bangalore | 2018 |
42 | Current Series Feedback Amplifier | Karthika K | K.S.Rangasamy College Of Technology, Tiruchengode | 2018 |
41 | Cascaded Bipolar Junction Transistor Amplifier | Sai Dharini | Anna University | 2018 |
40 | Design of Second Order Lowpass Filter Circuit using Op-Amp | A.Mathiyazhagan | Dr.Mahalingam College Of Engineering And Technology, Coimbatore | 2018 |
39 | Bandpass Filter Design using Opamp | V.Soundarrajan | K.S.Rangasamy College Of Technology, Tiruchengode | 2018 |
38 | Voltage Doubler and Voltage Tripler Circuit using Diode | Piyush Ahuja | National Institute of Technology Kurukshetra | 2018 |
37 | R-2R Ladder DAC using eSim | Hemavathi N V | East Point College of Engineering and Technology, Bengaluru | 2018 |
36 | Synchronous Decade Counter | Piyush Ahuja | National Institute of Technology Kurukshetra | 2018 |
35 | Design of Mod -10 Asynchronous Counter using J-K Flip Flop | Priya C Mule, Debajani Mahanta | Ramrao Adik Institute of Technology, Navi Mumbai | 2018 |
34 | Differential Amplifier using Op-Amp | K.Karthika | K.S.Rangasamy College Of Technology, Tiruchengode | 2018 |
33 | Design Of Binary Phase Shift Keying (BPSK) Modulator & Demodulator using eSim | Raghu K | REVA University, Bangalore | 2018 |
32 | Weinbridge Oscillator | R.Sowmya, S.Niheetha, B.Madhumitha | Dr.Mahalingam College Of Engineering And Technology, Coimbatore | 2018 |
31 | Two Stage RC Coupled Amplifier | S.Manju Priya, S.Sowmiya | Dr.Mahalingam College Of Engineering And Technology, Coimbatore | 2018 |
30 | Peltz Oscillator | Krithika.N, Vishnu Priyaa.V | Dr.Mahalingam College Of Engineering And Technology, Coimbatore | 2018 |
29 | Battery Charger (5V) without Transformer | R.K.Karthik Sridhar, S.Dayalan, L.Vignesh | Dr.Mahalingam College Of Engineering And Technology, Coimbatore | 2018 |
28 | Design Of Clipper Circuit using eSim | A.Aarthy, K.C.Charumathy, R.Genga Devi | Dr.Mahalingam College Of Engineering And Technology, Coimbatore | 2018 |
27 | DC Voltage Regulator | S Sethuram, M Sathish Kumar, C Gowtham | Dr.Mahalingam College Of Engineering And Technology, Coimbatore | 2018 |
26 | Design of Colpitt's Oscillator | S.Shubhakarani, T.Jeeva Rekha | Dr.Mahalingam College Of Engineering And Technology, Coimbatore | 2018 |
25 | Practical Cascode Amplifier | Sai Prasad.N, Thamil Selvan P.S | Sri Ramakrishna Engineering College, Coimbatore | 2018 |
24 | RC Phase Shift Oscillator | Rohini.N, Parkavi.K | Dr.Mahalingam College Of Engineering And Technology, Coimbatore | 2018 |
23 | Hartley Oscillator | N.Akshaya, S.Malarvizhi, A.Ashina | Dr. Mahalingam College Of Engineering And Technology, Coimbatore | 2018 |
22 | Class B Push Pull Amplifier | Mohammmed Zubair Kasab | MVJ College Of Engineering, Bangalore | 2018 |
21 | High Pass Filter Design using Op-Amp | V.Soundarrajan, S.Gokul, M.Govindharajan | K.S.Rangasamy College Of Technology, Tiruchengode | 2018 |
20 | Single Tuned RF Amplifier | Donepudi Suresh Babu | PSCMR College Of Engineering and Technology, Vijayawada | 2018 |
19 | Analog Multiplier using Operational Amplifier | Shekhar Maruti Nandanwar | K. C College Of Engineering And Management Studies And Research, Mumbai | 2018 |
18 | Negative Peak Shunt Clipper | Anilkumar V | REVA University, Bangalore | 2018 |
17 | Armstrong Oscillator | Harini Sankar, M.Sri Kumaran | Sri Ramakrishna Engineering College, Coimbatore | 2018 |
16 | Notch Filter | Abhilash Karankote | The National Institute Of Engineering, Mysuru | 2018 |
15 | Precision Plus/minus Clipping Circuit | Raghava M V, Abhilash Karankote | The National Institute Of Engineering, Mysuru | 2018 |
14 | Design of Switch Mode Power Supply | Vuppala Venkataramya | Gayatri Vidya Parishad College Of Engineering, Visakhapatnam | 2018 |
13 | Resonance of Series and Parallel RLC Circuit | Madhu Kiran Buddi | PSCMR College Of Engineering and Technology, Vijayawada | 2018 |
12 | Johnson Ring Counter | Lohit P | REVA University, Bangalore | 2018 |
11 | Monostable Multivibrator using Op-Amp | Shefali Kumari | Dayananda Sagar College Of Engineering, Bangalore | 2018 |
10 | Analysis of JKFF using eSim | Gloria | Indian Institute of Technology Bombay | 2017 |
9 | Analysis of Full Adder using eSim | Gloria | Indian Institute of Technology Bombay | 2017 |
8 | High Pass Filter using eSim | Gloria | Indian Institute of Technology Bombay | 2017 |
7 | Integrator using Opamp in eSim | Gloria | Indian Institute of Technology Bombay | 2017 |
6 | Analysis of Low Pass Filter using eSim | Gloria | Indian Institute of Technology Bombay | 2017 |
5 | Analysis of RC Circuit using eSim | Gloria | Indian Institute of Technology Bombay | 2017 |
4 | Analysis of RL Circuit using eSim | Gloria | Indian Institute of Technology Bombay | 2017 |
3 | Full Wave Bridge Rectifier | Gloria | Indian Institute of Technology Bombay | 2017 |
2 | Differentiator using Op-Amp | Gloria | Indian Institute of Technology Bombay | 2017 |
1 | Analysis of BJT Amplifier | Gloria | Indian Institute of Technology Bombay | 2017 |