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Adiabatic Logic Circuits (Proposed by Ms Yashwanthi V)
12 Volt And 5 Volt Power Supply (Proposed by Mr Shekhar Maruti Nandanwar)
12t Full Adder Design (Proposed by Mr Dhanussh Aditya V)
1:4 De Multiplexer (Proposed by Mr Krishna Kumar)
2 - Bit Magnitude Comparator (Proposed by Mr Sam Meshach D)
2 To 4 Decoder (with Enable) (Proposed by Mr Sam Meshach D)
2'S Complement o a 4-Bit Number (Proposed by Ms Vishakha Agarwal)
2:1 MUX Using Transmission Gate(using 0.5um Technology) (Proposed by Mr Sumanto Kar)
3 Bit Bidirectional Counter (Proposed by Ms Sowmya B)
3 Bit Synchronous Up Counter Using JK Flip Flops (Proposed by Mr Rishi Nair)
3 Phase Fully Controlled Rectifier (Proposed by Mr Jesus Bobin V)
3 Phase Uncontrolled Rectifier (Proposed by Mr Jesus Bobin)
3- Bit Even And Odd Parity Generator (Proposed by Ms Chirumerla Sri Lahari)
3-Bit Analog To Digital Converter Implemented Using Esim (Proposed by Mr Trinath Harikrishna)
3-Bit Asynchronous Down Counter (Proposed by Ms Dikshita Mehta)
3-Bit Asynchronous Down Counter Using D Flip Flops (Proposed by Mr Rishi Nair)
3-Bit Asynchronous Up Counter (using JK Flip Flops) (Proposed by Mr Gokul Jayan)
3-Bit Synchronous Down Counter (using JK Flip Flops) (Proposed by Mr Gokul Jayan)
4 Bit Magnitude Comparator using HDL code (Proposed by Ms Shanthi Priya Kalabandi)
4 Bit Mod-3 Counter (Proposed by Mr Rs Jyothish)
4 Bit Synchronous Down-Counter (Proposed by Dr Maheswari R)
4 Bit Synchronous Parallel In Parallel Out Register (Proposed by Dr Maheswari R)
4 Bit Synchronous Serial In Parallel Out (SIPO) Shift Register (Proposed by Dr Maheswari R)
4 Bit Synchronous Serial In Serial Out Shift Register (Proposed by Dr Maheswari R)
4 Bit Synchronous Up-Counter (Proposed by Dr Maheswari R)
4 To 2 Encoder (Proposed by Mr Krishna Kumar)
4-Bit Asynchronous Up Counter (Proposed by Ms Darshini R)
4-Bit Even Odd Parity Generator (Proposed by Ms Vishakha Agarwal)
4-Bit Mod-6 Counter Using Jk Flip Flop (Proposed by Mr Rs Jyothish)
4-Bit Mod-8 Johnson Counter Using J-K Flip-Flop (Proposed by Mr Anuj Singh Chauhan)
4-Bit Odd And Even Parity Generator (Proposed by Mr Malay Baldha)
4-Bit Right Barrel Shifter Using 2:1 Multiplexers (Proposed by Mr Shikhar Chandra)
4-Bit Ripple Counter Using D-Flipflops (Proposed by Mr Harsh Aryan)
4-Bit Wallace Tree Multiplier(with SKY130) (Proposed by Ms Amisha Shyam Sakhare)
4-Bit_asynchronous_down_counter (Proposed by Mr Tushar Moolchandani)
4:16 Demultiplexer (Proposed by Mr Akshay N. H.)
4t Xor Gate (Proposed by Mr Jagadheswaran M)
4x1 Multiplexer Using 2x1 Multiplexer (Proposed by Mr Vinay Karnati)
6-Bit Unsigned Multiplier Circuit With Dadda Tree Reduction And Brent-Kung Adder (Proposed by Mr Reuel Reuben)
6T CMOS Transmission Gates (tg) Implementation Of The XOR Function using SKY130 and NgVeri (Proposed by Ms Amisha Shyam Sakhare)
8 Bit Asynchronous Up Counter Using Jk Flip Flop (Proposed by Mr Tushar Moolchandani)
8 Bit Comparator using 7485 IC (Proposed by Mr Padigepati Mallikarjuna Reddy)
8 To 3 Bit Priority Encoder (Proposed by Mr Mohammad Khalique Khan)
9'S Complement Of A Bcd Digit (Proposed by Ms Susmitha K)
A 2-Bit Binary Adder Subtractor Circuit (Proposed by Mr Siddharth Singha Roy)
A Two Stage Common Emitter Amplifier In A Cascade Configuration With Npn And Pnp Transistor. (Proposed by Ms Krishan Kumar)
Ac Voltage Follower Circuit Using Esim (Proposed by Ms Sree Vishnu Varthini S)
Active Bandstop Filter Circuit (Proposed by Mr Vignesh S)
Adjusting Trigger Points Of Inverting Schmitt Trigger Using Diodes (Proposed by Ms Nirmitha N)
ADSR Envelope Generator (Proposed by Ms Ann Mariya Johnson)
All Pass Filter Using Op Amp (Proposed by Mr Nallam Karthikeya Kumar)
Amplitude Modulation-Demodulation Using eSim (Proposed by Ms Hrittika Ghosh)
Amplitude Shift Keying (Proposed by Ms Karthika K)
Amplitude Shift Keying Modulation-Demodulation Using Mixed Signal Circuit (Proposed by Ms Hrittika Ghosh)
Analog Multiplier using Operational Amplifier (Proposed by Mr Shekhar Maruti Nandanwar)
Analysis Of Alternating Current Limiter Circuit For Circuit Protection And Power Management (Proposed by Mr Manimaran)
Analysis Of Analog Divider Circuit Using Opamp (Proposed by Mr Shekhar Maruti Nandanwar)
Analysis of Astable Multivibrator using Transistors (Proposed by Mr Vishnu Mohan)
Analysis of BJT Amplifier (Proposed by Mrs Gloria)
Analysis of Full Adder using eSim (Proposed by Mrs Gloria)
Analysis of JKFF using eSim (Proposed by Mrs Gloria)
Analysis of Low Pass Filter using eSim (Proposed by Mrs Gloria)
Analysis Of MOSFET Characteristics (Proposed by Ms Monica Singh)
Analysis of RC Circuit using eSim (Proposed by Mrs Gloria)
Analysis of RL Circuit using eSim (Proposed by Mrs Gloria)
Antilog Amplifier Using Op-Amp (Proposed by Ms Kimberly Gemina Morais)
Armstrong Oscillator (Proposed by Ms Harini Sankar, M.Sri Kumaran)
Asynchronous 4bit Up Counter Using D Flip Flop (Proposed by Mr Tushar Moolchandani)
Asynchronous Down Counter Using D Flip Flop (Proposed by Mr Shreyas Bhaskar)
Bandpass Filter Design using Opamp (Proposed by Mr V.Soundarrajan)
Battery Charger (5V) without Transformer (Proposed by Mr R.K.Karthik Sridhar, S.Dayalan, L.Vignesh)
Bcd to Decimal Code Converter (Proposed by Mr Altaf Pathan)
Bcd To Excess-3 Code Conversion (Proposed by Mr Arjun Vishanth)
Bidirectional Shift Register using Flip Flops and Basic Gates (Proposed by Mr Akshay N. H.)
Binary To Grey Code Converter Using Logic Gates (Proposed by Mr Civanesh C)
Binary Weighted Resistor Dac (Proposed by Mr N. Saikiran)
Bistable Multivibrator (Proposed by Mr Sumanto Kar)
BJT based Differential Amplifier (Proposed by Mr Sumanto Kar)
Boost Converter (Proposed by Prof Leon Bosco Raj J)
Boot Strap Amplifier Using BJT (Proposed by Ms P. Yogeshwari)
Buck Converter (Proposed by Mr Leon Bosco Raj J)
Carry Look Ahead Adder (Proposed by Mr Akshay N. H.)
Carry Select Adder using BEC Logic (Proposed by Mr Athul M. S.)
Cascaded Bipolar Junction Transistor Amplifier (Proposed by Ms Sai Dharini)
Clapps Oscillator (Proposed by Ms Shubangi Mahajan)
Class A Amplifier (Proposed by Ms Karthika K.)
Class AB Amplifier (Proposed by Mr Sumanto Kar)
Class B Commutation Of SCR (Proposed by Ms Kimberly Gemina Morais)
Class B Push Pull Amplifier (Proposed by Mr Mohammmed Zubair Kasab)
CMOS NAND Gate Using 0.5um Technology (Proposed by Mr Sumanto Kar)
Cmos Rs Flip-Flop (Proposed by Ms Vishnupriya J)
Cmos Telescopic Cascode Differential Amplifier Using Esim And Sky130 Pdk (Proposed by Mr Parth Deshpande)
Common Collector Configuration Using Npn Bjt (Proposed by Ms Sudheshna P)
Common Emitter Bjt Amplifier Circuit (Proposed by Ms Shubhi Saxena)
Common Source Amplifier Using Jfet (Proposed by Ms M Jinu Mol)
Comparator Circuit using Op-Amp (Proposed by Ms Kimberly Morais)
Constant K High Pass Filter (Proposed by Ms Shubangi Mahajan)
Conventional Cmos Full Adder Circuit (Proposed by Mr Abhinav Goel)
Conversion Of 4x1 Multiplexer To 3x1 Multiplexer Using eSim (Proposed by Ms Aditi Anil Bodkhe)
Crc (7, 4) Decoder For Serial Data (Proposed by Mr Arjun Bathla)
Crc (7, 4) Encoder For Serial Data (Proposed by Mr Arjun Bathla)
Cuk Converter (Proposed by Prof Leon Bosco Raj J)
Current Mirror (Proposed by Ms Kimberly Gemina Morais)
Current Series Feedback Amplifier (Proposed by Ms Karthika K)
Current Shunt Feedback Amplifier (Proposed by Mr Vishvendra Prakash Goyal)
Cyclic Redundancy Check (7, 4) Decoder Circuit (Proposed by Mr Arjun Bathla)
Cyclic Redundancy Check (7, 4) Encoder Circuit (Proposed by Mr Arjun Bathla)
Darlington Pair Amplifier (Proposed by Mr Donepudi Suresh Babu)
Dc To Dc Buck Boost Converter (Proposed by Mr Varad Vilasrao Patil)
DC Voltage Regulator (Proposed by Mr S Sethuram, M Sathish Kumar, C Gowtham)
De Morgan’s Verification Circuit (Proposed by Ms Shubhangi Agrawal)
Decimal To BCD Encoder (Proposed by Ms Vadissa Yamini)
Design A Full Adder Using A 3 X 8 Decoder (Proposed by Mr Siddhant Sharma)
Design A Full Adder Using A 4:1 Mux (Proposed by Mr Bhavishya Kumar)
Design And Analysis Of An Array Multiplier Using An Area Efficient Full Adder Cell (using 10t Full Adder) with SKY130 (Proposed by Mr Kanchan Kumar Kaity)
Design And Analysis Of Twin-T Oscillator (Proposed by Mr Gadhiraju Surya Anirudh)
Design And Analysis Of Vackar Oscillator (Proposed by Mr Achyut Agrawal)
Design And Implementation Of Radiation-Hardened SRAM(SKY130) (Proposed by Mr Jayanth Nedunuri)
Design And Implementation Of 3x3 Cnot Peres Quantum Gate (Proposed by Mr Aditya Minocha)
Design And Implementation Of 4-Bit Magnitude Comparator Mixed Signal Circuit Performed In Esim (Proposed by Ms Vanshika Tanwar)
Design And Implementation Of Mixed-Signal 6t Sram Cell In Cmos Technology (Proposed by Mr Ankit Kumar)
Design And Implementation Of Mixed-Signal Bcd To 7-Segment Decoder Using Verilog. (Proposed by Mr Mir Mousam Ali)
Design And Mixed Signal Simulation Of a 4-Bit Pseudo Random Sequence Generator(LFSR) (Proposed by Mr Roshan Binu Paul)
Design And Simulation Of Asymmetric Astable Multivibrator Using Op-Amps And Diodes (Proposed by Mr Kaver S A)
Design and Simulation of Non-Inverting Amplifier Circuit (Proposed by Ms Vigashini G P)
Design of 1 Bit Logic Unit (Proposed by Mr Padigepati Mallikarjuna Reddy)
Design Of 2x1 Multiplexer (Proposed by Mr Shyam Sankalp Pattnaik)
Design Of 3 Bit Sipo Shift Register (Proposed by Mr Katakam V N Manikanta Bhargav)
Design Of 3 To 8 Line Decoder (Proposed by Mr Siddharth Bhuthapuri)
Design Of 3 X 8 Decoder Using 2 X 4 Decoders (Proposed by Mr Utukuri Geyarka S Nikhilesh)
Design of 4 Bit ALU (Proposed by Mr Padigepati Mallikarjuna Reddy)
Design of 4 Bit Full Adder with Fast Carry (Proposed by Mr Padigepati Mallikarjuna Reddy)
Design Of 4 Bit Magnitude Comparator Using Only Logic Gates (Proposed by Mr Mitta Venkata Rakesh Gupta)
Design Of 4 To 1 Multiplexer (Proposed by Mr Altaf Pathan)
Design of 4 To 2 Priority Encoder using Sub-Circuit Builder (Proposed by Mr Akash S)
Design Of 4-Bit Binary Combinational Lock Using Subcircuit Builder In eSim (Proposed by Mr Navin Kumar M)
Design Of 4-Bit Braun Multiplier Using Kogge-Stone Adder (Proposed by Mr P Manikandan Nair)
Design Of 4n25 Opto Isolator (Proposed by Mr Katakam V N Manikanta Bhargav)
Design of 74153 IC (Proposed by Mr Padigepati Mallikarjuna Reddy)
Design of 74157 IC (Proposed by Mr Padigepati Mallikarjuna Reddy)
Design Of 8 To 1 Multiplexer With Enable (Proposed by Mr Siddharth Bhuthapuri)
Design of a 4 to 16 Decoder using 3 to 8 Decoders (Proposed by Ms Neha Ann Shygen)
Design Of A 4-Bit Bcd To Gray Code Converter Circuit Using eSim (Proposed by Ms Sai Samyuktha N)
Design Of A 4-Bit Binary Adder Subtractor Circuit In Alu Using Full Adder Subcircuit In eSim (Proposed by Ms Sai Samyuktha N)
Design Of A 4-Bit Binary To Bcd Code Converter Ciruit Using Subcircuit Builder In eSim (Proposed by Mr S Gopi)
Design of A 4-Bit Gray To Binary Code Converter Circuit with Main Circuit And Subciruit Implementation using eSim (Proposed by Ms Sai Samyuktha N)
Design Of A Full Adder Using 2 Half Adder Sub Circuits (Proposed by Mr Chirag Goel)
Design Of A Nand Gate Based Decoder With Enable (Proposed by Ms Neha Ann Shygen)
Design Of A Self-Starting (lock-Out Free) 4-Bit Johnson Counter (Proposed by Mr Abhinav Tripathi)
Design Of A Static Ram(sram) Cell Based On D Flip-Flop Using Sky130nm Technology, Esim And Ng Spice Simulation Software (Proposed by Mr Ankush Mondal)
Design Of Binary Phase Shift Keying (BPSK) Modulator & Demodulator using eSim (Proposed by Prof Raghu K)
Design Of Clipper Circuit using eSim (Proposed by Ms A.Aarthy, K.C.Charumathy, R.Genga Devi)
Design of Colpitt's Oscillator (Proposed by Ms S.Shubhakarani, T.Jeeva Rekha)
Design Of Delta-Sigma Modulator Using eSim And SKY130 (Proposed by Mr Ashwini Kumar)
Design of Digital Decoder Counter using LM555 and IC4017 using eSim (Proposed by Mr Katakam V N Manikanta Bhargav)
Design of Dual Timer IC Circuit using LM555 in eSim (Proposed by Mr Katakam V N Manikanta Bhargav)
Design Of Excess-3 Code To Bcd Code (Proposed by Mr Arnab Mondal)
Design of Four Bit Carry Save Adder (Proposed by Mr Katakam V N Manikanta Bhargav)
Design of Four Bit Vedic Multiplier (Proposed by Mr Katakam V N Manikanta Bhargav)
Design Of Fredkin Cswap Quantum Gate Using Sky130 Pdk (Proposed by Mr Devansh Raut)
Design Of Full Adder Using Nor Gates (Proposed by Mr Abhimanyu Pundir)
Design of Full Subtractor Circuit (Proposed by Mr Katakam V N Manikanta Bhargav)
Design of Full Subtractor using 4×1 Multiplexer as a Sub Circuit (Proposed by Mr Karthik Raj R)
Design Of Full Subtractor Using Nand Gates (Proposed by Mr Utukuri Geyarka S Nikhilesh)
Design Of Full Wave Precision Rectifier Circuit Using Op-Amp (Proposed by Ms Prarthana Prasanna Kumar)
Design Of Half Adder Circuit Using Subcircuit Builder In eSim (Proposed by Mr S Gopi)
Design Of Half Adder Using 2 X 4 Decoder With Enable (Proposed by Mr Utukuri Geyarka S Nikhilesh)
Design Of Half Adder Using 4x1 Multiplexer (Proposed by Mr Karthik Raj R)
Design Of Half Adder Using Nand Gates (Proposed by Mr Abhimanyu Pundir)
Design of Half Subtractor Circuit (Proposed by Mr Katakam V N Manikanta Bhargav)
Design Of Half Wave Precision Rectifier Circuit Using Op-Amp (Proposed by Ms Prarthana Prasanna Kumar)
Design Of Ic 7483 (Proposed by Mrs Cc Kalyani)
Design Of Inverting Amplifier Using Lm741ic (Proposed by Mr Nandha Kumar S)
Design Of LM317 (Proposed by Mr Katakam V N Manikanta Bhargav)
Design Of Mixed Signal Based Buck-Converter Using Esim (Proposed by Mr Dilip Boidya)
Design of Mod -10 Asynchronous Counter using J-K Flip Flop (Proposed by Mrs Priya C Mule, Debajani Mahanta)
Design Of Positive Level Triggered Cmos D Latch Circuit (Proposed by Dr Ujwala Sushil Ghodeswar)
Design of Schmitt Trigger using Transistors (Proposed by Mr Vishvendra Prakash Goyal)
Design of Second Order Lowpass Filter Circuit using Op-Amp (Proposed by Mr A.Mathiyazhagan)
Design of Single-Bit Magnitude Comparator (Proposed by Ms Preeti Pallavi)
Design of Square Wave to Sawtooth Wave Convertor Circuit using BJT (Proposed by Ms Prarthana Prasanna Kumar)
Design Of Static Cmos Complex Circuit Function Y=not((a+b+c).d) (Proposed by Dr Ujwala Ghodeswar)
Design of Switch Mode Power Supply (Proposed by Ms Vuppala Venkataramya)
Design of Toffoli CCNOT Quantum Gate using Sky130 (Proposed by Mr Arpit Sharma)
Design of Two Bit Carry Look Ahead Adder using eSim (Proposed by Mr Katakam V N Manikanta Bhargav)
Design of Two Bit Multiplier (Proposed by Mr Katakam V N Manikanta Bhargav)
Design Of Two Input Or Gate Using Transmission Gate (Proposed by Dr Ujwala Ghodeswar)
Design Of Voltage-Controlled Oscillator using SKY130 Technology (Proposed by Mr Aman Singh)
Design Of Xnor Gate Using Nand Gates (Proposed by Mr Siddhant Sharma)
Design Of Xor Gate Using Nand Gates (Proposed by Mr Utukuri Geyarka S Nikhilesh)
Design Of Xor Gate Using Only Nor Gates (Proposed by Ms Preeti Pallavi)
Differential Amplifier using Op-Amp (Proposed by Ms K.Karthika)
Differential-End Current Starved Vco Implemented Using Skywater130 Pdk On Esim (Proposed by Mr Trinath Harikrishna)
Differentiator using Op-Amp (Proposed by Mrs Gloria)
Digital Sine-Wave Generator Using D Flip-Flop (Proposed by Mr Shalin A)
Diode Ladder Filter (Proposed by Ms Pooja R A)
Double Tail Comparator (Proposed by Mr Athul M. S.)
Dual Polarity Power Supply (Proposed by Ms Deepa Dilip Divate)
Effect Of Source Inductance On The Performance Of Diode Bridge Rectifier (Proposed by Mrs Nivedita Padole)
Fet Based Master Slave Negative Edge Triggered Flipflop Using Sky130pdk (Proposed by Mr Kanish R)
Five- Phase Uncontrolled Line Commutated Rectifier (Proposed by Mr Jesus Bobin V)
Frequency Divider(divide by 16) Using Flip-Flops (Proposed by Ms Shanthi Priya Kalabandi)
Full Adder Using 3-8 Decoder (Proposed by Mr Vinay Karnati)
Full Adder Using 3x8 Decoder (Proposed by Ms Vaishnavi Shukla)
Full Adder Using Cmos Mirror Logic (Proposed by Mrs Yajnesh K)
Full Adder Using Nand Gates (Proposed by Mr Arnab Mondal)
Full Adder Using Ngspice (Proposed by Ms Vaishnavi Shukla)
Full Subtractor (Proposed by Mr Rongala Arun)
Full Subtractor Circuit Using Subcircuits (2 Half Subtractors) (Proposed by Mr Tarun Elango)
Full Subtractor using 1x4 De-Multiplexer (Proposed by Mr Ajith Suresh)
Full Subtractor Using 3:8 Decoder (Proposed by Mr Ajith Suresh)
Full Subtractor Using Full Adder Subcircuit (Proposed by Mr Tarun Elango)
Full Subtractor Using Nor Gate Only(using 2 Half-Adder As A Subcircuit With Nor Gate Only) (Proposed by Mr Sumegh Sadashiv Gonugade)
Full Wave Bridge Rectifier (Proposed by Mrs Gloria)
Full Wave Rectifier Using Filter (Proposed by Ms Akanksha Goel)
Full Wave Rectifier With Capacitor Filter (Proposed by Ms Shubangi Mahajan)
Fully Controlled 5 Phase, 10 Pulse Rectifier (Proposed by Mr Jesus Bobin V)
Function Generator using NE566 (Proposed by Mr Mohd Irfan Yakub Ali)
Generation Of Pn Sequence With Internal 555 Timer-Based Clock Using eSim And SKY130 (Proposed by Mr Ashwini Kumar)
Half Adder Using Nand Gates And Sub-Circuit (Proposed by Mr Akash S)
Half Adder Using Nor Gates (Proposed by Ms Dikshita Mehta)
Half Adder Using Nor Gates (Proposed by Mr Arnab Mondal)
Half Bridge Inverter (Proposed by Mr Kamalesh D)
Half Subtractor Using Nand Gate (Proposed by Mr Sreenath S)
Half Subtractor Using Nor Gate (Proposed by Mr Sreenath S)
Half Subtractor Using Nor Gates (Proposed by Ms Darshini R)
Half Wave Rectifier For Positive Cycle (Proposed by Mr Arihantt Nandi)
Hartley Oscillator (Proposed by Ms N.Akshaya, S.Malarvizhi, A.Ashina)
High Pass Filter Design using Op-Amp (Proposed by Mr V.Soundarrajan, S.Gokul, M.Govindharajan)
High Pass Filter using eSim (Proposed by Mrs Gloria)
Highly Efficient Switching Mode Power Supply Using LM2596 (Proposed by Mr Sumanto Kar)
Howland Current Pump Circuit (Proposed by Mr Naman Girdhar)
IC 555 Testing Circuit (Proposed by Mr Shekhar Maruti Nandanwar)
IC LM317 Design And Implementation (Proposed by Mr Sumanto Kar)
Implementation Of 3 Input Nand Gate Using Transistor Transistor Logic. (Proposed by Mr Hamim Reja)
Implementation Of 4 Bit Binary Counter Mixed-Signal Circuit Performed In Esim (Proposed by Mr E Balakrishna)
Implementation Of And Gate Logic Using Nand(universal) Gate Logic (Proposed by Mr Hari Baskar)
Implementation Of And Gate Using Nor Gates (Proposed by Ms Shubhangi Agrawal)
Implementation Of ASK Using SKY130 (Proposed by Mr Amit Kripashankar Dubey)
Implementation of Bistable Multivibrator using Transistors (Proposed by Mr Sharath N Chittaragi)
Implementation Of D Flip Flop Using Cmos Technology (Proposed by Mr Abul Hasan)
Implementation Of Lewis Gray Comparator Circuit Performed In Esim (Proposed by Mr Gaurav Kumar)
Implementation Of Odd Stage Ring Oscillator Using 0.5um CMOS Process (Proposed by Mr Sharath N Chittaragi)
Implementation Of Or Gate Using Nor Gate. (Proposed by Mr Civanesh C)
Implementing SR Flip Flop using NAND Gates (Proposed by Mr Arjun Vishanth)
Implemention Of 2 Input Exclusive-Or Gate Using Emitter Coupled Logic (Proposed by Mr Mir Mousam Ali)
Instrumentation Amplifier (Proposed by Mr Pranav M)
Integrator using Opamp in eSim (Proposed by Mrs Gloria)
Inverting Amplifier And Cmos Inverter: Phase180inverse (Proposed by Dr Dr. Savita Gaur Kumar)
Inverting Schmitt Trigger Using 555 Timer (Proposed by Ms R. Divya)
Inverting Summer Using Op-Amp (Proposed by Mr Karthick Srivatsa R)
Johnson Ring Counter (Proposed by Mr Lohit P)
Karthaus - Fischer Cascade Voltage Doubler (kfcvd) Circuit (Proposed by Ms Francy Rani S)
KHN Biquad Active Filter Design (Proposed by Ms Nameera Jabi)
Logarithmic Amplifier Using Op-Amp (Proposed by Ms Kimberly Morais)
Logic Gates Represented Using Cmos In A Single Circuit (Proposed by Mr Vithul Vinu)
Logical Circuit For Safety Buzzer In A Car (Proposed by Mr Sumegh Sadashiv Gonugade)
Luo Converter (Proposed by Ms Krithika B S)
Mixed Signal 16 Bit Adder Using Sky130pdk (Proposed by Mr Kanish R)
Mixed Signal Design Of Variable Frequency Divider Using Esim And Ngveri (Proposed by Mr Trinath Harikrishna)
Mixed Signal Phase Frequency Detector Using Sky130pdk (Proposed by Mr Kanish R)
Mixed Signal SerDes Design Using SKY130 And eSim (Proposed by Mr Ayush Gupta)
Mixed-Signal Implementation Of Mod-10 (decade) Ripple Counter Using Ngveri Tool Of Esim (Proposed by Mr Mohammad Khalique Khan)
Mod 5 Synchronous Counter Using Mixed Signal And Sky130 (Proposed by Mr Subhradip Chakraborty)
Mod 8 Up/down Synchronous Counter Using 130nm Cmos Technology (Proposed by Ms Swagatika Meher)
Mod-7 Twisted Ring Counter Using J-K Flip Flop (Proposed by Mr Anuj Singh Chauhan)
Monostable Multivibrator Using BJTs (Proposed by Mr Sumanto Kar)
Monostable Multivibrator using Op-Amp (Proposed by Ms Shefali Kumari)
MOSFET based Class B Push Pull Amplifier (Proposed by Mr Adideb Das)
Nand Gate Using Nor Gate (Proposed by Mr Krishna Kumar S)
Narrow Band Pass Filter Using Op-Amp 741. (Proposed by Mr Nadeem Sharief B)
Narrow Band Reject Filter(notch Filter) (Proposed by Ms Shwethaa Rajagopalan)
Natural Sampling And Flat-Top Sampling Using Op-Amp. (Proposed by Dr Kavya A P)
Negative Clamper Using Lm741 Op Amp (Proposed by Ms Ashita Banger)
Negative Peak Shunt Clipper (Proposed by Prof Anilkumar V)
Nine Phase Uncontrolled Rectifier (Proposed by Mr Shalin. A)
Non-Inverting Amplifier (Proposed by Mr Sebin Sunny P)
Non-Inverting Summer Using Op-Amp (Proposed by Mr Karthick Srivatsa R)
Notch Filter (Proposed by Mr Abhilash Karankote)
Octal To Binary Encoder Using Cmos Technology, Esim And Sky130 Pdk (Proposed by Mr Parth Deshpande)
Opamp 741 Tester (Proposed by Mr Shekhar Maruti Nandanwar)
Or Gate Using Nand Gate (Proposed by Mr Krishna Kumar S)
Parallel Diode Positive Limiting Circuit. (Proposed by Mr Avant Rajiv Bagde)
Peak Detector Circuit (Proposed by Mr Shekhar Maruti Nandanwar)
Peltz Oscillator (Proposed by Ms Krithika.N, Vishnu Priyaa.V)
Positive Clamper Using Lm741 Op Amp (Proposed by Ms Ashita Banger)
Practical Cascode Amplifier (Proposed by Mr Sai Prasad.N, Thamil Selvan P.S)
Pre-emphasis and De-emphasis using IC 741 Op-amp (Proposed by Mr Akshay N. H.)
Precision Plus/minus Clipping Circuit (Proposed by Mr Raghava M V, Abhilash Karankote)
Programmable Frequency Divider (Proposed by Mr Arjun Bathla)
Pulse Position Modulator Using Ic 555 Timer With Esim. (Proposed by Mr Emandi Aakash)
PWM Modulator Using 555 Timer IC (Proposed by Ms Vadisa Yamini)
Quadrature Oscillator Using Opamp (Proposed by Ms Usha Kola)
Quadruple Two To One Line Multiplexer (Proposed by Ms Monisha.k)
Quasi Z Source Inverter (qzsi) (Proposed by Ms Bhakti Santosh Khumkar)
R-2R Ladder DAC using eSim (Proposed by Prof Hemavathi N V)
RC Phase Shift Oscillator (Proposed by Ms Rohini.N, Parkavi.K)
Resonance of Series and Parallel RLC Circuit (Proposed by Mr Madhu Kiran Buddi)
Reversible XOR Full Adder (Proposed by Ms Srinigha A)
RTL Inverter Gate Design and Simulation (Proposed by Mr Atin Mukherjee)
RTL Nand Gate Design and Simulation (Proposed by Mr Atin Mukherjee)
RTL NOR Gate Design and Simulation (Proposed by Mr Atin Mukherjee)
RTL of Full Adder using BJT Design and Simulation using eSim (Proposed by Mr Prashant Panchal)
RTL_XOR_using_BJT (Proposed by Mr Prashant Panchal)
Sawtooth Wave Generator (Proposed by Mr Shekhar Maruti Nandanwar)
SEPIC Converter (Proposed by Prof Leon Bosco Raj J)
Sequence Detector For The Sequence 1001 (Proposed by Mr Hari Baskar)
Series Diode Positive Limiting Circuit (Proposed by Mr Sanket Prakash Taile)
Series Regulator using Zener Diode as Control Element (Proposed by Ms Sai Dharini)
Shunt Voltage Regulator Using An Op-Amp (Proposed by Mr Kanishk K U)
Simple Elevator Door Controller For A Three-Story Building Using eSim (Proposed by Ms Aditi Anil Bodkhe)
Simple Long Duration Timer Circuit (Proposed by Ms R. Nivitaa)
Simple White Noise Generator (Proposed by Mr A.S. Arunprassath)
Simulation Of Two-Input Rtl And Gate Using Esim. (Proposed by Prof Mahesh S Pawar)
Single Phase AC Voltage Controller With R- Load (Proposed by Prof P Suji Garland)
Single Phase Diode Bridge Rectifier With Cr Load (Proposed by Mrs Nivedita Padole)
Single Phase Full Bridge Inverter (Proposed by Ms Shweta Khune)
Single Phase Inverter (Proposed by Prof Leon Bosco Raj J)
Single Phase Uncontrolled Rectifier With Rl Load And Freewheeling Diode (Proposed by Prof Akshay Dhanraj Kadu)
Single Tuned RF Amplifier (Proposed by Mr Donepudi Suresh Babu)
Single-Ended Primary Inductor Converter (Proposed by Mr Karthik Ayyala)
Single-Phase Half-Wave Uncontrolled Rectifier With R-Load (Proposed by Ms Anjali Papansingh Thakur)
Sky130 8-T SRAM Cell for High Speed Application (Proposed by Mr Vatsal Patel)
Small Signal Power Amplifier (Proposed by Mr Chandragiri Praveen Gandhi)
Square of A 3 Bit Binary Number (Proposed by Ms Bharathi E)
Square Wave Generator Using Lm741 (Proposed by Ms Tahanvi Yadav)
Squarewaveform Generator Using Cmos And Sky130 Pdk (Proposed by Mr Ankit Kumar)
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Techniques Of Modulation: Pulse Amplitude Modulation, Pulse Width Modulation With Mixed Signal (Proposed by Mr Partha Singha Roy)
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Three-Phase Full-Wave Rectification With R Load (Proposed by Ms Sahana D V)
Three-Phase Inverter (Proposed by Mr Mohamed Abdullah)
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Triangular Wave Generator using Op-Amp (Proposed by Prof Sebin Sunny P)
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Wide Band Pass Filter Using Op-Amp 741 (Proposed by Mr Kartik S Patil)
Z-Source Inverter (Proposed by Mr Ajin Raj D)
Zero Crossing Detector (Proposed by Mr A.Dave Andrew)
About the Circuit Simulation
Contributor Name:
Ms Karthika K
Title of the Circuit Simulation:
Amplitude Shift Keying
University:
K.S.Rangasamy College Of Technology, Tiruchengode
Project Guide Name:
Raguvaran K
Reference:
http://www.evalidate.in/lab3/pages/ASK/ASK_T.html
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