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About the research migration
  • Proposer Name: Mr Sabarish Mohan Js
  • Title of the research migration: TR gate Based Design of Reversible Full Subtractor
  • Source of the Project: Design of Efficient Reversible Binary Subtractors Based on a New Reversible Gate by Himanshu Thapliyal and Nagarajan Ranganathan published in 2009 IEEE Computer Society Annual Symposium on VLSI
  • University: Anna University