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About the research migration
  • Proposer Name: Mr Vijayasekar M
  • Title of the research migration: Simulation and Internal Circuit Analysis of the µA740 FET-Input Operational Amplifier
  • Source of the Project: P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th Edition, Wiley, 2009.
  • University: Anna University, Chennai
  • Name of the faculty: Janani