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About the research migration
  • Proposer Name: Mr Subikeesh M
  • Title of the research migration: Design and Optimization of an 8×1 Multiplexer Using 2×1 Multiplexer Modules
  • Source of the Project: 1. https://youtu.be/uoBZZ53Okvo?si=cHKWML2Soo8KmG65 2. Designing an 8x1 Multiplexer Using 2x1 Multiplexers in Verilog | by Mahnoor Zia | Medium 3. Design and implement the 8x1 MULTIPLEXER with 2x1 MULTIPLEXERs program using Verilog HDL - IC Applications and ECAD Lab | vikramlearning.com
  • University: Rajalakshmi Institute of Technology
  • Name of the faculty: Dr.Maheswari Raja