Completed Circuits

FOSSEE, IIT Bombay, along with VLSI System Design Corp. Pvt. Ltd and Redwood EDA conducted a 3-weeks high intensity eSim Mixed Signal Circuit Design and Simulation Marathon. Close to 1700+ students from all over India participated in this Marathon and close to 60+ students completed this marathon with brilliant circuit design ideas. The following participants have successfully completed designing the circuits. More details about this event can be found here: https://hackathon.fossee.in/esim/feb22/.

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S.No	Circuit Name	Participant Name	University
63	Design of First Order Sigma-Delta A/D Converter	Bishal Kumar Gupta	Defence Institute Of Advanced Technology ( In collaboration with NIELIT Calicut)
62	Design of 3bit Flash Type Analog to Digital Converter	Sumanyu Singh	Indian Institute of Information Technology, Allahabad
61	D flip flop to SR flip flop	Priyanka Tiwari	Govt engineering college raipur cg
60	DESIGN OF FLASH TYPE ADC	MANOJ KUMAR SINGH	INDIAN INSTITUTE OF INFORMATION TECHNOLOGY,ALLAHABAD
59	Function generator	Ananya N	ICT, Mumbai
58	8-Bit Digital Sine wave generator	Inderjit Singh Dhanjal	K. J SOMAIYA COLLEGE OF ENGINEERING
57	Clk-RVMYTH-DAC mixed-signal circuit Implementation and Simulations with eSim	Fahr	Self
56	Design of a 3-bit Flash ADC circuit using a Double-Tail Dynamic Comparator	Charaan S	Madras Institute of Technology, Anna University
55	Universal Flip Flop	Elavarasan P	Madras Institute of technology
54	Design and Implementation of 6T SRAM Cell	Aakash K	Cambridge Institute of Technology
53	Design Implementation of Subthreshold Source-Coupled Logic	Krishna Mahendrabhai Khatri	U V Patel College of engineering
52	HALF ADDER USING CMOS	ARAVINTH M	BANNARI AMMAN INSTITUTE OF TECHNOLOGY, SATHYAMANGALAM.
51	HALF ADDER USING PASS TRANSISTOR LOGIC	SRINIVASAN S	BANNARI AMMAN INSTITUTE OF TECHNOLOGY , SATHYAMANGALAM
50	3-bit Flash ADC	Samyuktha Shrruthi K R	Easwari Engineering College
49	RVMYTH MIXED SIGNAL	Yogapriya.B	Easwari Engineering College
48	Window Comparator Along With MOD-16 Counter For Counting Based Data Line Selection Operation	Nalinkumar S	Madras Institute of Technology Campus, Anna University
47	Design of step-Up converter using eSim and Verilog	DILIP BOIDYA	Tezpur University
46	Design and Implementation of 4 Bit Flash ADC mixed signal circuit performed in eSim	E BALAKRISHNA	DRONACHARYA GROUP OF INSTITUTION, GREATER NOIDA
45	CMOS BASED D FLIP FLOP	JAGADHESWARAN M	BANNARI AMMAN INSTITUTE OF TECHNOLOGY
44	JK FLIP FLOP	DHARSHNAA K	BANNARI AMMAN INSTITUTE OF TECHNOLOGY
43	Flash type Analog to Digital converter	K.Gurubaran	Madras Institute of Technology
42	Astable Multivibrator with Decade Counter	Ranjith S	Madras Institute of Technology, Anna University
41	Implementation of 3 Bit Flash ADC performed in eSim	Vanshika Tanwar	Dronacharya Group Of Institutions
40	Multiplexer design and simulation	Mohamed Irfan	B. S. Abdur Rahman Crescent Institute Of Science And Technology
39	Traffic controller	Anandita	NIT PATNA
38	Analysis of shift register using half wave rectifier	Rongala Arun	Sir C R Reddy College Of Engineering
37	Buck Converter	Abhinav C	Indian Institute of Technology, Dharwad.
36	FSM in ASIC with RF transmitter using eSim	Glenn Frey Olamit	NA
35	Design of Serializer with LVDS Driver	Madhuri Hemant Kadam	Shree L. R. Tiwari College of Engineering
34	Design and Simulate of 1001 Sequence detector Using eSim Tool	ANAND SINGH THAKUR	IIIT NAYA RAIPUR
33	Carry Lookahead Adder	Jitendra Singh Bisht	Bipin Tripathi Kumaon Institute of Technology
32	CMOS Schmitt Trigger	Ghanshyam Verma	IIIT NAYA RAIPUR
31	Implementation of Conventional Full Adder Architecture on CMOS Technology	Akhil D R	NXP Semiconductor
30	Common Emitter Amplifier	Dhilip S	KGiSL Institute of Technology
29	3-bit Binary counter with Astable multivibrator as clock circuit	VINISHA R	Madras Institute of Technology, Anna University
28	3-bit Flash ADC	Ramachandra T	Madras Institute of Technology, Anna University
27	4-Bit Johnson Counter with ring oscillator	Ganapathi Subramanian.R	Madras Institute of Technology-Anna University
26	Implementation of Instrumentation Amplifier for ECG System Application	MANSI SHUKLA	IIIT NAYA RAIPUR
25	Designing of Frequency divider circuit using 3-bit / Mod-8 / divide-by-8 asynchronous counter	Aishwarya Balkrishna Patil	Kolhapur Institute of Technology’s College of Engineering, Kolhapur
24	Two Input NOR Gate	Shaik Sardhar Hussain	Ellenki college of Engineering and Technology
23	3-bit Flash Analog to Digital Converter	Krishna Gupta	Jaypee Institute of Information Technology
22	4-bit CARRY LOOK AHEAD ADDER	PAVAN PRAKASH GUTTI	SDMCET DHARWAD
21	4 Bit Asynchronous Up counter	AGARAM THEJA	MOTILAL NEHRU NATIONAL INSTITUTE OF TECHCNOLOGY, ALLAHABAD
20	Design and Implementation of Mixed Signal Circuit 2 to 1 MUX	Radha Kulkarni	Marathwada Mitra Mandal's College of Engineering
19	Design of a 4-bit Counter Type or Ramp Type Analog to Digital converter	Rishabh Verma	Zakir Husain College of Engineering & Technology, ZHCET, AMU, Aligarh
18	Dadda Multiplier	Prateek Sinha	IIT Jammu
17	Implementation of High Speed 3-bit Flash type ADC	Akash Arun Ambekar	KIT's College of Engineering, Kolhapur
16	Cockroft Walton charge pump using NMOS technology	Pranaav Jothi M	Madras Institute of Technology Campus, Anna University
15	Resistor Transistor Logic NOR Gate	Prakash Rawat	Jagan Institute of Management Studies, Sector-5 ,Rohini
14	Design of Elevator using ASM	JANAKI RAM EMANI	CVR COLLEGE OF ENGINEERING
13	Design of 8 to 3 bit priority encoder using mixed signal	ABHINANDAN R APPANNAVAR	S.D.M COLLEGE OF ENGINEERING AND TECHNOLOGY, DHARWAD-580002
12	Implementing Johnson Counter with Astable multivibrator	Narra Hemanth Reddy	JNTUH COLLEGE OF ENGINEERING, HYDERABAD
11	In-Memory DAC inside 8T SRAM cell	Abhash Kumar	National Institute of Technology Patna
10	Basic Astable 555 Oscillator Circuit	Mayank Patil	Vidyavardhini's College of Engineering and Technology
9	3-bit Wallace Multiplier	Mayur Vithal Dongre	Indian Institute of Information Technology Nagpur
8	Frequency Divider using Astable Multivibrator and Counter	Vatsal Patel	Vishwakarma Government Engineering College
7	Smart Locking System IC Design	Bhawarth Gupta	Bharati Vidyapeeth (Deemed University) College of Engineering, Pune
6	Staircase Wave Generation using Analog and Digital Blocks	R.V.Rohinth Ram	Madras Institute of Technology Campus, Anna University
5	JK flip flop in mixed signals	G VINAY KUMAR	SDM college of engineering and technology
4	3bit Digitally Controlled PWM Generator	Souhardhya Paul	Netaji Subhash Engineering College
3	8-BIT SRAM IMPLEMENTED USING eSIM AND NgVeri	Trinath Harikrishna	SRM IST
2	Design and Analysis of a 2 to 1 Multiplexer	Soham Sen	Amity University Kolkata
1	Gated S-R Latch interfaced with ADC and DAC	Mihir Rana	Nirma University