Completed Circuits

FOSSEE Project in collaboration with VLSI System Design (VSD) Corp. Pvt. Ltd and the Ministry of Education, Govt. of India conducted a 2-weeks high intensity eSim Circuit Design and Simulation Marathon using Skywater 130nm technology, a fully open source process design kit. Close to 3000+ students from all over India participated in this Marathon and close to 200+ students completed this marathon with brilliant circuit design ideas. The following participants have successfully completed designing the circuits. More details about this event can be found here: https://hackathon.fossee.in/esim.
NoCircuit NameParticipant NameInstitute
1Design and Analysis of a 2-input NAND Gate in 130 nm CMOS TechnologySoham SenAmity University Kolkata
2CMOS Used As NAND ApplicationHrishikesh BadigerKLE Technological University
3THREE PHASE INVERTERMohamed AbdullahSt. Xavier’s Catholic College of Engineering
4CMOS NAND GATECornilious v.gSt.Xaviers Catholic College of Engineering
5Conversion of JK flip-flop to D flip-flop using CMOS-NOT Gate.Sidhant priyadarshiKLE Technological University
6Low power and High speed 1 bit full adder circuitAyush BhardwajKIET Group of Institutions Ghaziabad
7CMOS Schmitt TriggerKalaiarul SPSG college of technology
8A Conventional 2 input CMOS NAND gate circuitVineet GahlanDronacharya College of Engineering
9NAND Gate Design Sumanto KarFR. CONCEICAO RODRIGUES COLLEGE OF ENGG.
10D Flip FlopA.SaniyaKLE TECHNOLOGICAL UNIVERSITY
11DESIGN AND ANALYSIS OF 2 INPUT NAND GATE USING 180nm CMOS TECHNOLOGYJittin Varghese MathewASSSAM DON BOSCO UNIVERSITY
12CMOS NAND Gate CircuitBhavana khanapurKLE Technological University-Hubballi
13two stage operational amplifiern devi shivaniAnurag university
14Implementation of a 8-bit CMOS Wallace Tree MultiplierKarthik M BMaven Silicon VLSI Training Center
15Low Voltage CMOS Schmitt TriggerSIBANI SASMALAMaharaja Surajmal Institute Of Technology
16Two Input NOR gate using CMOSYogeshwary ShindeD.Y Patil Institute of Technology , Pimpri
17Design of 2 bit Parity Generator using Pseudo NMOS logicMahisha.B.MR.M.K.Engineering College
18A Low Power 7T SRAM cell using Supply Feedback Technique CMOSVivek AryaIIIT Allahabad
19Design of 1-bit full adder using CMOS mirror logicBhawarth GuptaBharati Vidyapeeth College of Engineering Pune
20Dynamic charge sharing comparatorAnmol SaxenaDhirubhai Ambani Institute of Information and Communication Technology
211-bit NP-CMOS Dynamic Full AdderJohn Johnson VNational Institute of Technology Calicut
22double edge pulse triggered JK flip flopS SHIVA SHANKAR REDDYAMRITA VISHWA VIDYAPEETHAM
23FULL ADDER USING CMOSDilip DVELALAR COLLEGE OF ENGINEERING AND TECHNOLOGY
24Portable Mobile Charger for outdoor tripsAishik DasUniversity of Calcutta.
25Positive Edge triggered D Flip Flop using Clocked MOS logic (Dynamic)Tarush SinghMCT rajiv gandhi institute of technology
26Design of 4:1 Multiplexer using Transmission gatesJyoti Balappa HalkarniKLE Technological University
27NMOS Schmitt trigger SRAMYash BettgeriVeermata Jijabai technological Institute
283_Stage_CMOS_Ring_OscillatorVikhas VSri Sivasubramaniya Nadar College of Engineering
29NMOS Wilson Current MirrorNalinkumar SMadras Institute of Technology Campus, Anna University
30D Flip-Flop using CMOSJacintha Beena MathiasMangalore Institute Of Technology And Engineering
314-bit Carry Lookahead AdderAman VermaUniversity of Allahabad
32Schmitt TriggerDILIP BOIDYATezpur University
33Cmos XNOR gateAdarsh S ShettyMangalore Institute of Technology and Engineering
34CMOS Transmission GateMinauteeMIT World Peace University
35Design and Analysis of two input NAND gateMANJUNATHAyenepoya institute of technology
368x4 right Barrel Shifter using NMOS pass transistor logicInderjit Singh DhanjalK. J SOMAIYA COLLEGE OF ENGINEERING
37Two Stage CMOS Operational AmplifierR.V.Rohinth RamMadras Institute of Technology Campus, Anna University
38BGR using cascode current mirrorPriyanka L PatilKLE Technological University Hubballi (India)
39Design and Analysis of DIBO Differential AmplifierAditya KalyaniIndian Institute of Technology, Dharwad
403T DRAM CellAastha DaveBirla Institute of Technology and Science Pilani, Hyderabad
41Phase Frequency Detector for Phase locked loopsG Victor SwaroopVNR Vignan Jyothi Institute of Engineering and Technology
423-bit resistor string DACT AKSHAYABITS Pilani Hyderabad Campus
43Single Stage Operational Amplifier Using CMOSRithwik JangamGraphic era (Deemed to be University)
44Low Power SRAM CellVignesh BharadwajBITS Pilani Hyderabad Campus
45Half AdderShraddha Jayant TeliKLE Technological University
46Bandgap Voltage reference using OP-AMP architecture.Vineet P NKLE Technological University, Hubballi
47Design of a Current Mirror Circuit in 130 nm CMOS TechnologySoham SenAmity University Kolkata
48CMOS Design of 2:1 Multiplexer Using Complementary Pass Transistor logPreetam KumarIIT Delhi
49D FLIP FLOP USING TRANSMISSION GATESDHATRISH TEWARINIT JALANDHAR
50CMOS Differential cascade voltage switch logic(DCVSL) XOR-XNORKrishnamoorthy RSRM Easwari engineering college
51Operational AmplifierRohini Nandkumar MhatreDon Bosco Institute Of Technology
52Design and Analysis of Two Stage CMOS Operational AmplifierAbhishek Singh KushwahaIndian Institute of Information Technology, Dharwad
53Design and Analysis of SR FlipflopChinmaya Nilakantha NaikMangalore Institute of technology and Engineering
54Five -Stage CMOS Ring OscillatorHIMANSHU BHATTMangalore Institute of Technology and Engineering
558 bit Successive-approximation-register Analog-to-Digital ConverterK NavaneethN.M.A.M Institute of Technology, Nitte
56Low Noise Low Power Amplifier for Biomedical ApplicationsMohammad Shama ParveenVignan's Institute for Science, Technology and Research
57CMOS NOR Gate using SKYwater 130nm technologyABU MAHAMED ADILASSAM DON BOSCO UNIVERSITY
58Design and Analysis of Two Input NOR GateAbhishek BhatMangalore Institute of Technology and Engineering, Moodabidre
59Design and Analysis of Half AdderNikethan PoojaryMangalore Institute of Technology and Engineering
602:1 MULTIPLEXER USING PASS TRANSISTOR LOGICSOUVIK CHATTERJEEKALYANI GOVERNMENT ENGINEERING COLLEGE
61CMOS AS AN INVERTER CIRCUITSudeshna PahariINSTITUTE OF RADIOPHYSICS AND ELECTRONICS, UNIVERSITY OF CALCUTTA
62TWO INPUT XOR GATE USING CMOS 130nmFATIMA SHABIR ZEHGEERgovernment college of engineering and technology ganderbal kashmir
63CMOS NAND GATE USING 130NM TECHNOLOGYIlka ShawlGovernment College of Engineering and Technology, Ganderbal, Kashmir
64Implementation of 3 Stage Ring Oscillator Using CMOSRatul ChakrabortyUniversity of Calcutta
652:1 MUX USING CMOS LOGICMOHAMED TOUSIFATRIA INSTITUTE OF TECHNOLOGY
66Design of CMOS Transmission Gate based 4:1 MUX using SKY130 PDKSupriya KhatoniarTezpur University
67Transmission Gate Based Full AdderRaghav VermaDronacharya Group of Institutions
68CMOS NOR GateAmulya NarkhedeRamrao Adik Institute of Technology
69ONE BIT MIRROR ADDER WITH SKY130nm PDK & eSim toolShalini KannaUniversity of Massachusetts Lowell
704 bit Binary to gray code converter using 2x1 MUXKomal M MadikarKLE Technological University
71SRAM cell using TRIMODE MTCMOS power and ground gated techniqueGanesamoorthy BChegg India Pvt Ltd
72MIRROR WITH MULTIPLE OUTPUTSKiran K MudholKLETECH UNIVERSITY HUBLI
73Design of Low Transconductance OTAMulpuri DivyaVignans Institute for Science Technology and Research
74DESIGNING AND IMPLEMENTATION OF SR FLIP-FLOP USING SKY130 TechnologyJoji JoseGovernment Engineering College, Idukki
754-Bit Parity GeneratorS Sai Venkata Kishan KumarIIIT, Tiruchirappalli
76RING OSCILLATORTattukolla GowthamiVignan's Foundation for Science, Technology & Research
77DESIGN OF 2-4 DECODER IN DIFFERENT CMOS LOGIC STYLES.Pallepogu DivyaVignan's Foundation for Science, Technology & Research.
78NOR Gate - CMOS Technology.Angelyn Sweety.ISt.Joseph's College of Engineering, OMR, Chennai.
792-INPUT CMOS NAND GATEHarish krishna RPSG College of Technology
80Design of Exclusive-OR Gate using CMOS and SKY130 PDK technologyMohammad Khalique KhanAliah University, Kolkata
814 Bit Binary to Gray code converter using Transmission GateGyanvi AgarwalMaharaja Surajmal Institue of Technology
82Audio Power AmplifierUPPALA BHARGAVA SAIVNR VIGNANA JYOTHI INSTITUTE OF ENGINEERING AND TECHNOLOGY
83Low power NAND gate based full subtractor using CMOS TechnologyAAKASH.MEaswari Engineering College
842:1 multiplexer using CMOS 130nm technologySAYEEDURRAHMANZHCET, Aligarh Muslim University
85Analysis of CMOS InverterRAUNAK GIRIAssam Engineering College
86Multiplexer based design of Half AdderBindu VaishnaviVNR VJIET
87NMOS Differential AmplifierAjay Kumar SahuNIT Jamshedpur
88Symmetric CMOS NOR GateSruthi Priya D.MEaswari Engineering college
89A D-Type Flip-Flop with Enhanced Timing Using Low Supply voltage.Kesanasetty Leela SravaniVignan's Foundation for Science Technology and Research
90Approximate compressorsAvula SwapnamadhuriVignans Foundation for Science Technology and Research
91Design of 12 bit Carry Select Adder using CMOS LogicSoorya Krishna KSrinivas Institute of Technology, Mangalore
92D Flip Flop using CMOS TechnologyGokul MAtria Institute of Technology
93Manchester encoder and Miller EncoderPerumalla Durga VasaviVignan's Foundation for Science Technology and Research
948T FULL ADDERVani cherviralaVNR VJIET
95Folded Cascode AmplifierVesapaga Grace nissiVignan's Foundation for Science, Technology & Research
96LowVoltageLowPower Amplifier based on MOSFET Darlington ConfigurationMANGALAPALLY NAVEEN KUMARVNR Vignana Jyothi Institute of Engineering &Technology
97Logic NAND gate design using CmosSUJATA HULLOLIKLE technological University Hubli
98Design of IC 741 tester circuitTVN SrikarVNRVJIET
992:1 Multiplexer using Transmission GateRaja BishtBirla Vishvakarma Mahavidyalaya
100Design of Half Adder using CMOS TechnologyRutuja KageKLE Technological University,Hubli
101Design of Approximate compressorsketha chandana tejaswiniVignans Foundation for Science and Technology and Research
102Design and Analysis of Dickson Charge Pump using CMOS technologyCharaan SMadras Institute of Technology Campus Anna University
103Low Power CMOS Analog Multiplier using skywater 130nm pdkChiranjeevi RPSG College of Technology
104Darlington amplifierYogapriya BEaswari Engineering College
1052:4 Decoder using mixed logic CMOS gatesAkash BarmanAssam Engineering College
106Implementation of Full Adder using SkyWater 130nm PDKBalla Lalith KumarGayatri Vidya Parishad college for Degree and PG Courses
107CMOS 2:1 MUX Design and ImplementationA DEVIPRIYACambridge Institute of Technology, K R Puram, Bangalore
108DESIGN OF 3 INPUT NAND GATE USING CMOSDs Sai RohithSJCE MYSURU
109The Two Stage CMOS Operational Amplifier with Frequency CompensationMadhuri Hemant KadamShree L. R. Tiwari College of Engineering
110Designing and Plotting the characteristics of a Cascode Current MirrorArchika MalhotraINDIRA GANDHI DELHI TECHNICAL UNIVERSITY FOR WOMEN
111Designing and Plotting the characteristics of a Cascode Current MirrorArchika MalhotraINDIRA GANDHI DELHI TECHNICAL UNIVERSITY FOR WOMEN
112Transmission GateVatsal B PatelVishwakarma Government Engineering College
113CMOS InverterVigneshSt Joseph Engineering College, Mangalore
114Design and Analysis of TSPC D flip-flop using eSimAditi SinghIndira Gandhi Delhi Technical University for Women
115NOR gate using CMOS 130 technologyE BALAKRISHNADRONACHARYA GROUP OF INSTITUTION, GREATER NOIDA
116Full wave Bridge rectifier using CMOSSiddharth HandeDr. D. Y. Patil Institute of Technology
117CMOS Rail-to-Rail Operational AmplifierManasi YadavInstitute of Technology, Nirma University
118NAND Gate using CMOS in 130nm technology performed in e-simVanshika TanwarDronacharya Group Of Institutions
119RC Phase Shift Oscillator using FETSamyuktha Shrruthi K REaswari Engineering College
120Ring Oscillator Using Sky130ROHAN V PATILKLE TECHNOLOGICAL UNIVERSITY
121Miller compensated Two stage operational amplifierAnjana JahagirdarKLE Technological University,Hubballi,Karnataka
122Design of two stage op-ampMili AnandIGDTUW
123Current mode logic CML latchAbhishek BhandariIIT Dharwad
124CMOS 3 STAGE RING OSCILLATOR using 0.25u CMOS TECHNOLOGYAAKASH KCAMBRIDGE INSTITUTE OF TECHNOLOGY ,K R PURAM BENGALURU
125High Efficiency Dc-Dc Buck Boost ConverterADITYA WAGHWalchand College of Engineering, Sangli
126Gilbert Multiplier CellVaikunth GuruswamyMadras Institute of Technology, Anna University
1272x1mux using CMOSBarnali MukherjeeKalyani Government Engineering College
12832-bit ALUPARAS SANJAY GIDDManipal Institute of Technology
129Voltage DividerJayantha NayakMangalore Institute of Technology and Engineering, Moodubidri
130SR Flip Flop using CMOS TechnologyManjit KalitaAssan Engineering College
131CMOS InverterDinesh Babu PSri Ramakrishna Engineering College
1323T NAND gateAkhil HadliBMS College of Engineering
133Full Adder using CMOSPrerana DasAssam Engineering College
134Full Adder implementation on Dynamic CMOS LogicShreyas BhatKLE Technological university
135CMOS SCHMITT TRIGGERVighneshwar B HegdeKLE Technological University Hubballi
1362:1 Multiplexer using CMOS logicJessica Danica VazNitte Meenakshi Institute Of Technology
137D Latch using CMOS Transmission Gate(TG) switchesAnkit BorahAssam Engineering College
138AND gate using CMOS technologyB ABHISHEKKLE technological university, HUBLI