Completed Circuits

FOSSEE Project in collaboration with VLSI System Design (VSD) Corp. Pvt. Ltd and the Ministry of Education, Govt. of India conducted a 2-weeks high intensity eSim Circuit Design and Simulation Marathon using Skywater 130nm technology, a fully open source process design kit. Close to 3000+ students from all over India participated in this Marathon and close to 200+ students completed this marathon with brilliant circuit design ideas. The following participants have successfully completed designing the circuits. More details about this event can be found here: https://hackathon.fossee.in/esim/2021.
NoCircuit NameParticipant NameInstitute
138Design and Analysis of a 2-input NAND Gate in 130 nm CMOS TechnologySoham SenAmity University Kolkata
137CMOS Used As NAND ApplicationHrishikesh BadigerKLE Technological University
136THREE PHASE INVERTERMohamed AbdullahSt. Xavier’s Catholic College of Engineering
135CMOS NAND GATECornilious v.gSt.Xaviers Catholic College of Engineering
134Conversion of JK flip-flop to D flip-flop using CMOS-NOT Gate.Sidhant priyadarshiKLE Technological University
133Low power and High speed 1 bit full adder circuitAyush BhardwajKIET Group of Institutions Ghaziabad
132CMOS Schmitt TriggerKalaiarul SPSG college of technology
131A Conventional 2 input CMOS NAND gate circuitVineet GahlanDronacharya College of Engineering
130NAND Gate Design Sumanto KarFR. CONCEICAO RODRIGUES COLLEGE OF ENGG.
129D Flip FlopA.SaniyaKLE TECHNOLOGICAL UNIVERSITY
128DESIGN AND ANALYSIS OF 2 INPUT NAND GATE USING 180nm CMOS TECHNOLOGYJittin Varghese MathewASSSAM DON BOSCO UNIVERSITY
127CMOS NAND Gate CircuitBhavana khanapurKLE Technological University-Hubballi
126two stage operational amplifiern devi shivaniAnurag university
125Implementation of a 8-bit CMOS Wallace Tree MultiplierKarthik M BMaven Silicon VLSI Training Center
124Low Voltage CMOS Schmitt TriggerSIBANI SASMALAMaharaja Surajmal Institute Of Technology
123Two Input NOR gate using CMOSYogeshwary ShindeD.Y Patil Institute of Technology , Pimpri
122Design of 2 bit Parity Generator using Pseudo NMOS logicMahisha.B.MR.M.K.Engineering College
121A Low Power 7T SRAM cell using Supply Feedback Technique CMOSVivek AryaIIIT Allahabad
120Design of 1-bit full adder using CMOS mirror logicBhawarth GuptaBharati Vidyapeeth College of Engineering Pune
119Dynamic charge sharing comparatorAnmol SaxenaDhirubhai Ambani Institute of Information and Communication Technology
1181-bit NP-CMOS Dynamic Full AdderJohn Johnson VNational Institute of Technology Calicut
117double edge pulse triggered JK flip flopS SHIVA SHANKAR REDDYAMRITA VISHWA VIDYAPEETHAM
116FULL ADDER USING CMOSDilip DVELALAR COLLEGE OF ENGINEERING AND TECHNOLOGY
115Portable Mobile Charger for outdoor tripsAishik DasUniversity of Calcutta.
114Positive Edge triggered D Flip Flop using Clocked MOS logic (Dynamic)Tarush SinghMCT rajiv gandhi institute of technology
113Design of 4:1 Multiplexer using Transmission gatesJyoti Balappa HalkarniKLE Technological University
112NMOS Schmitt trigger SRAMYash BettgeriVeermata Jijabai technological Institute
1113_Stage_CMOS_Ring_OscillatorVikhas VSri Sivasubramaniya Nadar College of Engineering
110NMOS Wilson Current MirrorNalinkumar SMadras Institute of Technology Campus, Anna University
109D Flip-Flop using CMOSJacintha Beena MathiasMangalore Institute Of Technology And Engineering
1084-bit Carry Lookahead AdderAman VermaUniversity of Allahabad
107Schmitt TriggerDILIP BOIDYATezpur University
106Cmos XNOR gateAdarsh S ShettyMangalore Institute of Technology and Engineering
105CMOS Transmission GateMinauteeMIT World Peace University
104Design and Analysis of two input NAND gateMANJUNATHAyenepoya institute of technology
1038x4 right Barrel Shifter using NMOS pass transistor logicInderjit Singh DhanjalK. J SOMAIYA COLLEGE OF ENGINEERING
102Two Stage CMOS Operational AmplifierR.V.Rohinth RamMadras Institute of Technology Campus, Anna University
101BGR using cascode current mirrorPriyanka L PatilKLE Technological University Hubballi (India)
100Design and Analysis of DIBO Differential AmplifierAditya KalyaniIndian Institute of Technology, Dharwad
993T DRAM CellAastha DaveBirla Institute of Technology and Science Pilani, Hyderabad
98Phase Frequency Detector for Phase locked loopsG Victor SwaroopVNR Vignan Jyothi Institute of Engineering and Technology
973-bit resistor string DACT AKSHAYABITS Pilani Hyderabad Campus
96Single Stage Operational Amplifier Using CMOSRithwik JangamGraphic era (Deemed to be University)
95Low Power SRAM CellVignesh BharadwajBITS Pilani Hyderabad Campus
94Half AdderShraddha Jayant TeliKLE Technological University
93Bandgap Voltage reference using OP-AMP architecture.Vineet P NKLE Technological University, Hubballi
92Design of a Current Mirror Circuit in 130 nm CMOS TechnologySoham SenAmity University Kolkata
91CMOS Design of 2:1 Multiplexer Using Complementary Pass Transistor logPreetam KumarIIT Delhi
90D FLIP FLOP USING TRANSMISSION GATESDHATRISH TEWARINIT JALANDHAR
89CMOS Differential cascade voltage switch logic(DCVSL) XOR-XNORKrishnamoorthy RSRM Easwari engineering college
88Operational AmplifierRohini Nandkumar MhatreDon Bosco Institute Of Technology
87Design and Analysis of Two Stage CMOS Operational AmplifierAbhishek Singh KushwahaIndian Institute of Information Technology, Dharwad
86Design and Analysis of SR FlipflopChinmaya Nilakantha NaikMangalore Institute of technology and Engineering
85Five -Stage CMOS Ring OscillatorHIMANSHU BHATTMangalore Institute of Technology and Engineering
848 bit Successive-approximation-register Analog-to-Digital ConverterK NavaneethN.M.A.M Institute of Technology, Nitte
83Low Noise Low Power Amplifier for Biomedical ApplicationsMohammad Shama ParveenVignan's Institute for Science, Technology and Research
82CMOS NOR Gate using SKYwater 130nm technologyABU MAHAMED ADILASSAM DON BOSCO UNIVERSITY
81Design and Analysis of Two Input NOR GateAbhishek BhatMangalore Institute of Technology and Engineering, Moodabidre
80Design and Analysis of Half AdderNikethan PoojaryMangalore Institute of Technology and Engineering
792:1 MULTIPLEXER USING PASS TRANSISTOR LOGICSOUVIK CHATTERJEEKALYANI GOVERNMENT ENGINEERING COLLEGE
78CMOS AS AN INVERTER CIRCUITSudeshna PahariINSTITUTE OF RADIOPHYSICS AND ELECTRONICS, UNIVERSITY OF CALCUTTA
77TWO INPUT XOR GATE USING CMOS 130nmFATIMA SHABIR ZEHGEERgovernment college of engineering and technology ganderbal kashmir
76CMOS NAND GATE USING 130NM TECHNOLOGYIlka ShawlGovernment College of Engineering and Technology, Ganderbal, Kashmir
75Implementation of 3 Stage Ring Oscillator Using CMOSRatul ChakrabortyUniversity of Calcutta
742:1 MUX USING CMOS LOGICMOHAMED TOUSIFATRIA INSTITUTE OF TECHNOLOGY
73Design of CMOS Transmission Gate based 4:1 MUX using SKY130 PDKSupriya KhatoniarTezpur University
72Transmission Gate Based Full AdderRaghav VermaDronacharya Group of Institutions
71CMOS NOR GateAmulya NarkhedeRamrao Adik Institute of Technology
70ONE BIT MIRROR ADDER WITH SKY130nm PDK & eSim toolShalini KannaUniversity of Massachusetts Lowell
694 bit Binary to gray code converter using 2x1 MUXKomal M MadikarKLE Technological University
68SRAM cell using TRIMODE MTCMOS power and ground gated techniqueGanesamoorthy BChegg India Pvt Ltd
67MIRROR WITH MULTIPLE OUTPUTSKiran K MudholKLETECH UNIVERSITY HUBLI
66Design of Low Transconductance OTAMulpuri DivyaVignans Institute for Science Technology and Research
65DESIGNING AND IMPLEMENTATION OF SR FLIP-FLOP USING SKY130 TechnologyJoji JoseGovernment Engineering College, Idukki
644-Bit Parity GeneratorS Sai Venkata Kishan KumarIIIT, Tiruchirappalli
63RING OSCILLATORTattukolla GowthamiVignan's Foundation for Science, Technology & Research
62DESIGN OF 2-4 DECODER IN DIFFERENT CMOS LOGIC STYLES.Pallepogu DivyaVignan's Foundation for Science, Technology & Research.
61NOR Gate - CMOS Technology.Angelyn Sweety.ISt.Joseph's College of Engineering, OMR, Chennai.
602-INPUT CMOS NAND GATEHarish krishna RPSG College of Technology
59Design of Exclusive-OR Gate using CMOS and SKY130 PDK technologyMohammad Khalique KhanAliah University, Kolkata
584 Bit Binary to Gray code converter using Transmission GateGyanvi AgarwalMaharaja Surajmal Institue of Technology
57Audio Power AmplifierUPPALA BHARGAVA SAIVNR VIGNANA JYOTHI INSTITUTE OF ENGINEERING AND TECHNOLOGY
56Low power NAND gate based full subtractor using CMOS TechnologyAAKASH.MEaswari Engineering College
552:1 multiplexer using CMOS 130nm technologySAYEEDURRAHMANZHCET, Aligarh Muslim University
54Analysis of CMOS InverterRAUNAK GIRIAssam Engineering College
53Multiplexer based design of Half AdderBindu VaishnaviVNR VJIET
52NMOS Differential AmplifierAjay Kumar SahuNIT Jamshedpur
51Symmetric CMOS NOR GateSruthi Priya D.MEaswari Engineering college
50A D-Type Flip-Flop with Enhanced Timing Using Low Supply voltage.Kesanasetty Leela SravaniVignan's Foundation for Science Technology and Research
49Approximate compressorsAvula SwapnamadhuriVignans Foundation for Science Technology and Research
48Design of 12 bit Carry Select Adder using CMOS LogicSoorya Krishna KSrinivas Institute of Technology, Mangalore
47D Flip Flop using CMOS TechnologyGokul MAtria Institute of Technology
46Manchester encoder and Miller EncoderPerumalla Durga VasaviVignan's Foundation for Science Technology and Research
458T FULL ADDERVani cherviralaVNR VJIET
44Folded Cascode AmplifierVesapaga Grace nissiVignan's Foundation for Science, Technology & Research
43LowVoltageLowPower Amplifier based on MOSFET Darlington ConfigurationMANGALAPALLY NAVEEN KUMARVNR Vignana Jyothi Institute of Engineering &Technology
42Logic NAND gate design using CmosSUJATA HULLOLIKLE technological University Hubli
41Design of IC 741 tester circuitTVN SrikarVNRVJIET
402:1 Multiplexer using Transmission GateRaja BishtBirla Vishvakarma Mahavidyalaya
39Design of Half Adder using CMOS TechnologyRutuja KageKLE Technological University,Hubli
38Design of Approximate compressorsketha chandana tejaswiniVignans Foundation for Science and Technology and Research
37Design and Analysis of Dickson Charge Pump using CMOS technologyCharaan SMadras Institute of Technology Campus Anna University
36Low Power CMOS Analog Multiplier using skywater 130nm pdkChiranjeevi RPSG College of Technology
35Darlington amplifierYogapriya BEaswari Engineering College
342:4 Decoder using mixed logic CMOS gatesAkash BarmanAssam Engineering College
33Implementation of Full Adder using SkyWater 130nm PDKBalla Lalith KumarGayatri Vidya Parishad college for Degree and PG Courses
32CMOS 2:1 MUX Design and ImplementationA DEVIPRIYACambridge Institute of Technology, K R Puram, Bangalore
31DESIGN OF 3 INPUT NAND GATE USING CMOSDs Sai RohithSJCE MYSURU
30The Two Stage CMOS Operational Amplifier with Frequency CompensationMadhuri Hemant KadamShree L. R. Tiwari College of Engineering
29Designing and Plotting the characteristics of a Cascode Current MirrorArchika MalhotraINDIRA GANDHI DELHI TECHNICAL UNIVERSITY FOR WOMEN
28Designing and Plotting the characteristics of a Cascode Current MirrorArchika MalhotraINDIRA GANDHI DELHI TECHNICAL UNIVERSITY FOR WOMEN
27Transmission GateVatsal B PatelVishwakarma Government Engineering College
26CMOS InverterVigneshSt Joseph Engineering College, Mangalore
25Design and Analysis of TSPC D flip-flop using eSimAditi SinghIndira Gandhi Delhi Technical University for Women
24NOR gate using CMOS 130 technologyE BALAKRISHNADRONACHARYA GROUP OF INSTITUTION, GREATER NOIDA
23Full wave Bridge rectifier using CMOSSiddharth HandeDr. D. Y. Patil Institute of Technology
22CMOS Rail-to-Rail Operational AmplifierManasi YadavInstitute of Technology, Nirma University
21NAND Gate using CMOS in 130nm technology performed in e-simVanshika TanwarDronacharya Group Of Institutions
20RC Phase Shift Oscillator using FETSamyuktha Shrruthi K REaswari Engineering College
19Ring Oscillator Using Sky130ROHAN V PATILKLE TECHNOLOGICAL UNIVERSITY
18Miller compensated Two stage operational amplifierAnjana JahagirdarKLE Technological University,Hubballi,Karnataka
17Design of two stage op-ampMili AnandIGDTUW
16Current mode logic CML latchAbhishek BhandariIIT Dharwad
15CMOS 3 STAGE RING OSCILLATOR using 0.25u CMOS TECHNOLOGYAAKASH KCAMBRIDGE INSTITUTE OF TECHNOLOGY ,K R PURAM BENGALURU
14High Efficiency Dc-Dc Buck Boost ConverterADITYA WAGHWalchand College of Engineering, Sangli
13Gilbert Multiplier CellVaikunth GuruswamyMadras Institute of Technology, Anna University
122x1mux using CMOSBarnali MukherjeeKalyani Government Engineering College
1132-bit ALUPARAS SANJAY GIDDManipal Institute of Technology
10Voltage DividerJayantha NayakMangalore Institute of Technology and Engineering, Moodubidri
9SR Flip Flop using CMOS TechnologyManjit KalitaAssan Engineering College
8CMOS InverterDinesh Babu PSri Ramakrishna Engineering College
73T NAND gateAkhil HadliBMS College of Engineering
6Full Adder using CMOSPrerana DasAssam Engineering College
5Full Adder implementation on Dynamic CMOS LogicShreyas BhatKLE Technological university
4CMOS SCHMITT TRIGGERVighneshwar B HegdeKLE Technological University Hubballi
32:1 Multiplexer using CMOS logicJessica Danica VazNitte Meenakshi Institute Of Technology
2D Latch using CMOS Transmission Gate(TG) switchesAnkit BorahAssam Engineering College
1AND gate using CMOS technologyB ABHISHEKKLE technological university, HUBLI