Project Name - final
Incase Errors

1. In case Counterfile (Digital verilog block) isnt found rerun ngveri.

2. Rise time and fall time for all blocks in Ki-Cad tab- adc,dac,counterr, and Reset pulse signal have 
	rise time = fall time = 1ps=0.000000000001s

	circuit will not function properly if any of above is missed or changed.
	so set the again if they are missing.

3. Please contact me incase of any unresolvable error as its functioning and i am not sure if any files is not properly configured
	nityanand.singh310@gmail.com /// 9643710894

4. i will also attach Optional other folders for my reference at Github