Synopsis : 
The circuit proposed in the paper is an SRAM where the invertor is constructed using Voltage Booster NMOS Schmitt Trigger. There are three input lines namely vwl (WL) , vbl(BL) and vbl_ (~BL) and two voltage sources vdd and vdd1 where vdd1 = vdd1 + Vth(sky130_fd_pr__nfet_01v8). The input lines control the operation mode of SRAM . vdd and vdd1 are supply voltages for invertor mosfets. Refering to sky130_fd_pr folder, the threshold voltage for sky130 1.8V NMOS  is Vth = 0.6 V. So, vdd1 = vdd + 0.6. It can be observed that (vq)Q and (vq_)~Q reach to Vdd when high thus proving that voltage boosting works. This boost helps better voltage swing. 
In the circuit, I have chosen vdd = 1.8 V and thus vdd1=2.4 V.


Project Work:
Int his project, I have designed a single circuit file which supports sky130 mosfets. I have not added any subcircuit files. Over the course of this project following are the tasks I performed:
1. Did an extensive research to get an idea of EDA, PDKs, sky130 pdk, MOSFET designs and working    principles.
2. Researched about 6 to 7 research paper to study better configuration SRAM circuits, studies    why they work better, Learned SRAM fundamentals.
3. Designed a 2bit dac circuit using esim tool and along the way, learnt esim software,    creating, understanding and editing netlist, creating subcircuit, using subcircuit, learnt    sky130 and read the files to understand what they actually perform.
4. Designed a fully functional SRAM using different architecture with expected waveforms. 

Working:
To run the ST_SRAM.cir circuit file 
1. Add the sky130_fd_pr folder in the same folder which has ST_SRAM.cir.
2 a. double click on it or
  b. run the ngspice command using command prompt. Open cmd, Go to the ngspice folder and type - "ngspice [address of the .cir file]"

Upon running the file, a single plot window is generated. By default READ plot will open. To open the WRITE plot, open the ST_SRAM.cir file using notepad, uncomment lines 24, 25, 26 and commment lines 29, 30 and 31. To display WRITE plot again do vice versa. For each plot, 5 graphs will be plotted in the order (from top to bottom) vwl, vbl, vbl_, vq, vq_ For reference purposes the target plot is also attached in final report. Note : To comment a line add "*" at the start of the line.

For Write Operation vwl = vdd and vbl = ~vbl_. The outputs vq and vq_ behave as expected. They hold the values when vwl = 0 and change the values according to vbl when vwl = vdd.

For Read Operation vwl = vdd and vbl = vbl_=vdd. The outputs vq and vq_ behave as expected. A read destruction cycle is observed when vb1 = vb1_ = vdd and vw1 = vdd in vq.




Challenges:
In circuit designing, I faced "output connected to output" issue. This was because I used power flag near two different ground points, so the circuit assumed the points were connected.

The major issue I faced was in while editing the circuit file to make it sky130 compatible. I had to run it several times before I realized all the mistakes and learnt them the hard way. Few of them were:
1. Do not use special character "~" in the file. "_" can be used.
2. The voltage node names should start with 'v'.
3. proper use of pulse, pwl statements syntax.







