Just had a power flag issue while ERC, and used a ff corner library, along with normal inverter ratio of 6 to 1 for PMOS to NMOS, and a channel length of 500nm by hit and trial, for acquiring pulse shaped comparator output as per specified reference.
The output pulse vout acquired is uniform with a brief amount of ripple observed. Only other issue observed was placing the V in front of clk port in .cir file for ngspice to process it. Also scaled up voltages accordingly as per 1.8 V requirement.