2:1 Multiplexer using CMOS logic

Introduction:

A 2 to 1 multiplexer consists of two inputs vin_1 and vin_2, one select input ‘select’ and one output ‘vout’. We can derive the Boolean Expression of a 2 to 1 Multiplexer as vout= !select(vin_1) + select(vin_2), where !select indicates negation of select signal. Depending on the select signal, the output is connected to either of the inputs. The static CMOS based 2:1 MUX using the above Boolean expression has been designed using a pull-up network consisting of 4 pMOS and a pull-down network consisting of 4 nMOS.

Steps involved in design and implementation of the circuit:

1) Literature Survey:
-> Referred various papers and websites regarding the design and working of 2:1 multiplexer. Analysed the reference circuit and truth table.

2) Implementing the circuit using esim:
-> Developed schematic for 2:1 mux using CMOS logic circuit. It consists of pull-up network of 4 pmos and a pull-down network consisting of 4 nMOS. The pull up network is constructed using two parallel pMOS circuits connected in series. The pull-down network is constructed using two series nMOS circuits connected in parallel
-> The output of the Static CMOS logic is connected to an inverter to obtain the correct output. VDD is connected to the pull-up circuit to provide power supply and the ground is connected to the pull-down circuit
-> There is another inverter for to get the inverted output of the select signal as both non-inverted and inverted select signals are necessary for the correct functioning of the circuit
-> Once all the connections are made, Input and Output ports are assigned. Here we have 5 ports in total for select signal, two input signals, vdd and output. Mosfets are other components are also labelled
-> After this, electrical rules check is done to check if there are any wrong connections or any errors in the circuit

3) Developing Netlist using skywater130 pdk:
-> Generate netlist option is selected from the esim window. This generates the netlist for our circuit. We need to now convert this netlist to include sky130 mosfets
-> First, we import the technology files, i.e., the libraries which contain the model parameters are imported
-> Next the circuit description is given in the netlist which shows how a component is connected to other components
-> Finally, simulation commands are provided. Here input 1 is a pulse wave of width 5us and time period 10us and input 2 is a pulse wave of width 2.5us and time period 5us
-> The select signal is a pulse wave of width 10us and time period 20us. All the 3 inputs have voltage ranging from 0v to 3v
-> Transient analysis is performed and the plot command is used to plot the waveforms of vin_1, vin_2, select and vout

4) Obtaining waveforms using ngspice:
-> When the netlist is executed using ngspice, waveforms of the 2 inputs, select signal and output is obtained
-> It can be observed that when the select signal is low, output wave takes form of the first input vin_1 and when the select signal is high, the output takes form of the second input, vin_2
-> Each of these waveforms are plotted one above the other within the same plot by shifting the signals (by adding some positive value to signal value)

Future Improvements/ Problems encountered:

-> This circuit design works perfectly when both the inputs are digital in nature. But what happens when we give analog input such as a sine wave? When sine wave was given as a input to the digital multiplexer, I observed that only the positive part of the sine wave is detected by the circuit and output waveform has some positive voltage
-> This makes sense because the each mosfet has a certain threshold voltage and the mosfet turns on only if the input voltage is above the threshold voltage. Hence, the negative part of the sine wave does not appear in the output
-> Hence, this circuit can be further improved so that it can take up analog signals as input and thus making it an analog multiplexer. This is a really interesting topic that I would like to work upon after the marathon is completed