In the hackthon, to design a circuit of my own using the skywater 130nm technology
pdk files, I followed the following steps...

Firstly I decided my circuit as the Differential cascade voltage switch logic circuit
that outputs an xnor and an xor simultaneously.

I started with the subckt design first, as I wanted my input as both the digital pulse and its complement
I had to design an inverter circuit to negate the input, for this I designed the
inverter using cmos technology...

I made the layout, performed the labelling and then performed ERC and generated netlist, 
after that I replaced the netlist with the 
"skywater 130nm tech pdk" for the circuit components model. I inserted the transient 
parameters to check whether my subckt worked fine. It did do!

now I moved on to make a component of my own using the library editor, I made a schematic
look for my inverter resembeling a NOT gate, I did this after the KiCad to ngspice conversion
I saved the library file as a subckt file and preceeded building my main ckt

In the main circuit, I progressed the same way like I did with my sub ckt, I made all the 
layout, labelling, ERC and then generated my netlist of which the sub ckt was also
part of.

now I changed the circuit component netlist values to the 130 nm format of the skywater
130nm pdk library. The subckt file was also made into the technology and appended
to the actual simulation file.

commands in the ngspice netlist such as .include and .subckt were present to include
one file into another.

the final simulation was carried out and there was a problem with the ngspice plot crashing
with a fatal error, it was rectified after creating a seperate folder with the entire
skywater 130nm library with all the required subckts, cir, cir.out and lib files.

this is how i progressed with my circuit to obtain the desired output that I plotted 
using the necessary signals as input and suitable transient analysis parameters

kudos to the team for providing us this oppurtunity to learn from this hackathon.
the detailed description of what to be done through courses came handy. The effort from the 
mentors made it possible to submit the outputs on time    