A D-type Flip-Flop With Enchanced Timing Using Low Supply:-

	Firstly connect the circuit diagram in esim. In esim first go to new project then give project name then click ok open the schematic of the your project and using place component we can choose the components required to our circuit and place component in the schematic window and connect the circuit connections through wire as per circuit diagram and give component names and input output port names and annotate the circuit and check the ERC if there are no errors then generate netlist.to generate netlist go to spice select default format and click on generate the .cir file is generated.
For .cir file go to esim workspace and projectname and copy file and paste in the skywater130 folder.
Edit the .cir file remove all the slash and add .lib "models/sky130.lib.spice" tt and give input voltage delay time,rise time,fall time, timeperiod and pulse width and for plotting the output give plot(inputs/outputs).

While implementing my circuit I have faced problem while running the .cir file Error:no such vector D,clk,x2,Q to over come that problem i have changed my slave circuit.After changing the slave circuit again i got Error: no such vector x2 to over come that i removed x2 port after that i got my final output without x2 in the waveforms. 

For my project first implemented the master latch and next to that i attached slave latch and designed schematic file for masterslave and generated the netlist and copied the .cir files and .sub files to the skywater130 folder and edit the .cir files giving input and plotting and then save and run the file.the ngspice window opens and output waveform window opens.


